ASIC RTL Design Specialist

5 days ago


Delhi, Delhi, India MY SEARCH Full time

The role of a Digital Logic Design Engineer at MY SEARCH involves designing and developing high-quality RTL code for ASICs using System Verilog, Verilog, or VHDL. The ideal candidate will have 4-11 years of relevant industry experience in RTL design for ASICs and proficiency in digital logic design. Experience in IP design or SoC integration and expertise in developing or integrating RTL using System Verilog, Verilog, or VHDL are also essential. The engineer will collaborate with cross-functional teams to integrate RTL into larger systems, ensuring adherence to industry standards and best practices for Lint, CDC, synthesis, and timing. Prioritizing low-power design knowledge and staying updated on industry trends are key responsibilities. Excellent communication skills are required to effectively convey complex technical information.



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