Leading ASIC RTL Design Expert

2 days ago


Delhi, Delhi, India Mulya Technologies Full time
Job Description

Mulya Technologies is a US-based startup seeking an experienced Principal IP Design Engineer for its growing team.

Role Summary:

We are looking for a seasoned ASIC RTL development expert to join our team. The successful candidate will be responsible for designing and developing high-performance, low-power, and area-efficient digital circuits using Verilog.

About the Job:

  • Create detailed design documents, considering performance, power, and area requirements.
  • Design and develop complex digital blocks in Verilog, ensuring optimal performance, power consumption, and area efficiency.
  • Perform functional and performance simulations, identifying and debugging issues.
  • Collaborate with the verification and back-end teams to deliver high-quality designs.

Requirements:

  • Bachelor's/Master's degree in Electronics Engineering or a related field, with 8-12 years of experience in ASIC RTL development.
  • Strong expertise in System Verilog and experience with Lint, CDC, and synthesis checks.

Benefits:

We offer a competitive salary range of $150,000 - $220,000 per annum, based on qualifications and experience.



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