Senior ASIC Design Engineer

14 hours ago


Delhi, Delhi, India Mulya Technologies Full time

Mulya Technologies, a well-established company founded by highly respected Silicon Valley veterans, is seeking talented individuals for the role of Principal IP Design Engineer.

Ahead of its design centers in California and Hyderabad, this US-based product startup offers an exciting opportunity for skilled ASIC/RTL/Logic Design Engineers to join its team.

The ideal candidate will possess strong expertise in creating micro-architecture and detailed design documents that consider performance, power, and area requirements. Additionally, they should be proficient in performing RTL coding for complex design blocks in Verilog, conducting function/performance simulation checks, and debugging.

Key responsibilities include understanding lint/CDC/synthesis checks, power analysis, and LEC checks, as well as defining constraints and working with the team to deliver high-quality designs.

To succeed in this role, candidates must have a B.E/M. Tech degree and 8-12 years of experience in ASIC RTL development, with solid experience in System Verilog and knowledge of lint and CDC.

This position offers a competitive salary range of $180,000 - $250,000 annually, commensurate with experience and qualifications.



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