Highly Skilled RTL Design Expert Wanted for ASIC IP Development
2 days ago
Job Description:
National average salary for this position in India: ₹1,200,000 - ₹1,800,000 per annum.
We are looking for a seasoned Senior ASIC/RTL Design Engineer to join our team at SISOC Semiconductor Technologies Pvt Ltd. As an expert in digital design, you will be responsible for developing high-quality RTL code for ASIC IPs and SoCs using Verilog.
About the Role:
- Design and integrate complex IP blocks with a focus on performance, power, and area optimization
- Utilize Synopsys/Cadence/Mentor simulation tools for functional verification and debugging
- Collaborate effectively with cross-functional teams to ensure project success
- Possess strong understanding of basic SoC architecture, including standard cells and I/O blocks
Requirements:
- 7+ years of experience in ASIC design with a strong focus on RTL development
- Expertise in Verilog/RTL coding for IP and SoC design
- In-depth knowledge of digital logic design principles and methodologies
- Proven experience in designing and integrating large-scale IP blocks
- Proficiency in Synopsys/Cadence/Mentor simulation tools for functional verification and debugging
Bonus Points:
- Familiarity with Perl/TCL scripting for automation (desirable)
- Prior experience with RTL logic synthesis, SDC writing, and constraint management (desirable)
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