
Principal DFT Architect
11 hours ago
Job Overview:
We are seeking a seasoned professional to lead the design for test (DFT) efforts on advanced finFET technology. As a Principal DFT Engineer - SoC, you will be responsible for defining and implementing DFT architectures and methodologies for block-level, sub-system, and system-on-chip (SoC) applications.
Key Responsibilities:
- Define and develop DFT architecture and methodology for block-level, sub-system, and SoC, including scan, memory built-in self-test (MBIST), intellectual property (IP) tests, and JTAG.
- Lead the implementation of DFT for different sub-systems and full-chip designs.
- Develop test insertion flows for scan, MBIST, and JTAG operations.
- Achieve targeted test coverage and automatic test equipment (ATE) test time through optimization and innovation.
- Develop timing constraints for all DFT modes and ensure seamless integration with other design components.
Required Skills and Qualifications:
- 8+ years of experience leading complex DFT execution in advanced finFET technology, with a proven track record of delivering high-quality results under tight deadlines.
- Must have experience mentoring and guiding junior DFT engineers to enhance their skills and knowledge base.
- In-depth knowledge of VLSI design principles and hardware description languages such as Verilog and VHDL.
- Deep expertise with electronic design automation (EDA) tools like Synopsys Tetramax or Mentor Tessent.
- Strong problem-solving and debugging capabilities, with the ability to analyze complex issues and implement effective solutions.
Personal Attributes:
- Can-do attitude, with a strong emphasis on teamwork, creativity, and problem-solving skills.
- Self-driven individual with excellent communication skills and the ability to work effectively in cross-functional teams.
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