Design Verification Engineer
6 days ago
About Cadence Design Systems, Inc.
Cadence Design Systems, Inc. is a leader in the development of electronic design automation (EDA) software and hardware used to design and verify electronic systems.
Job Summary
We are seeking a highly skilled Design Verification Engineer to join our team in Pune. As a Design Verification Engineer, you will be responsible for developing and executing verification plans, developing testbenches, and debugging complex digital designs.
Key Responsibilities
- Develop and execute verification plans for complex digital designs
- Design and develop testbenches using System Verilog and OVM/UVM methodologies
- Debug and validate designs using simulation and emulation tools
- Collaborate with designers and architects to understand design requirements and develop verification plans
- Develop and maintain documentation of verification plans, testbenches, and design debug
Requirements
- B.E/B.Tech 2+ years of experience in Design Verification or M.E/M.Tech (full time)
- Experience with System Verilog, OVM/UVM, and popular EDA simulation tools
- Excellent written and oral communication skills
- Ability to work in a team environment and collaborate with designers and architects
What We Offer
Cadence Design Systems, Inc. offers a competitive salary and benefits package, as well as opportunities for professional growth and development. If you are a motivated and detail-oriented individual with a passion for design verification, we encourage you to apply for this exciting opportunity.
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