Senior ASIC Design Engineer

3 days ago


Hyderabad Secunderabad Telangana, India beBeeDesignEngineer Full time ₹ 15,00,000 - ₹ 20,00,000

The role requires a strong analytical and debugging mindset, with the ability to effectively communicate ideas.

  • Job Description:
  • To integrate AMD internal IPs RTL/DV environments into SoC, requiring detail-oriented skills and experience between 7 to 13 years.
  • Key Responsibilities:
  • Debug function/performance of Graphics, Display, SMU IPs, engaging with IP and SOC teams to drive closure to IP RTL deliverables.
  • Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation.
  • Drive design and methodology improvements across teams to enhance overall program execution.
  • PREFERRED EXPERIENCE:
  • Proficiency in Verilog/VHDL RTL design languages.
  • ASIC DV experience in reusable verification methodology such as UVM.
  • Knowledge of chip bus interfaces such as AHB, AXI, and various standard peripherals & interfaces is preferred.
  • Hands-on experience in chip level Design/Integration activities.
  • Knowledge of SOC design specification, architecture, and micro-architecture.
  • ACADEMIC CREDENTIALS:
  • Bachelor or Masters Degree in Electrical Engineering, Computer Engineering or Computer Science.


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