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High-Level ASIC Designer
2 weeks ago
Our organization is seeking an experienced Senior ASIC Design Engineer to join our team. The successful candidate will be responsible for leading the design of complex ASICs, from concept to delivery.
Responsibilities:- Leverage expertise in ASIC design flows and sub-20nm technology nodes to develop high-quality designs.
- Maintain a strong understanding of digital design principles and experience with RTL design in Verilog/SystemVerilog.
- Develop and implement clock constraints, false paths, multi-cycle paths, IO delays, exceptions, and waivers.
- Collaborate with the DFX team to integrate DFX controllers, insert scans, and perform MBIST checks.
- Design and implement RAMs based on targeted memory compilers.
- Ensure seamless integration with existing systems and support functional verification simulations as needed.
- Bachelor's or Master's degree in Electrical Engineering (EE), Computer Engineering (CE), or related field with 5+ years of relevant experience.
- Proven track record of success in ASIC design flow and direct experience with ASIC design in sub-20nm technology nodes.
- Experience with modern SOC tools, including Spyglass, Questa CDC, Cadence Conformal, and VCS simulation.
- Preferred experience in AXI4 or NOC protocols or DRAM memory interfaces.
- Strong scripting skills in TCL, Perl, or Python.