
System IP Architect
3 days ago
We are seeking an experienced System IP verification engineer to design, develop and implement world-class verification infrastructure for system IPs. The ideal candidate will have a strong understanding of memory management at the core/system level and be proficient in building robust verification environments using SystemVerilog and UVM.
Key Responsibilities:
- Design and develop verification plans and environments for system IPs
- Implement and maintain complex hardware subsystems using SystemVerilog and UVM
- Develop and execute stimulus plans, checkers and debug techniques for verifying complex hardware subsystems
- Collaborate with cross-functional teams to integrate features spanning multiple IPs
- Drive coverage closure and ensure high-quality results
Requirements:
- Bachelor's or Master's degree in Electrical Engineering, Computer Science or related field
- Strong experience with SystemVerilog and UVM-based verification
- Proven ability to drive IP-level and subsystem-level DV projects
- Familiarity with core MMU or SMMU/IOMMU, bus protocols like AXI
What We Offer:
- Opportunity to work on large-scale projects with a small focused team
- Chance to structure and deliver configurable IPs to SoCs with seamless integration
- Collaboration with RTL designers, architects and other engineers
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