
IP/Subsystem Verification Specialist
21 hours ago
The ideal candidate will have proven experience verifying complex design blocks at the IP, Sub-system or SoC level using System Verilog/UVM or related technologies.
Key Responsibilities:- Develop and enhance testbenches to verify new features for client, server, graphics, and semi-custom interconnects.
- Collaborate with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop expertise in Infinity Fabric architecture.
- Understand TestBench Architecture and develop expertise in Verification Components.
- Mentor junior engineers.
- Proficient in ASIC verification at the IP or Sub-system level.
- Architected and developed complex verification environments and infrastructure.
- Exposure to RTL design, software development, formal verification, or other related domains.
- Experience in UVM TestBench Development preferred.
- RAL experience is a plus.
This role offers opportunities for professional growth and development.
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