Design Synthesis Engineer

Job Description">We are seeking an experienced Synthesis Design Engineer to join our team. As a key member of the design team, you will be responsible for performing logical and physical synthesis of blocks in IP.">Key Responsibilities:Design Synthesis: Perform logical and physical synthesis of blocks in IP to ensure optimal performance, area, and power...

Job Title:Synopsis:A professional with a strong foundation in synthesis and automation is required to drive our technology forward.About the Role:This position demands a comprehensive understanding of front-end EDA design methodologies, proficiency in Perl, Tcl, or Python scripting skills, and prior experience with logic synthesis tools. The ideal candidate...

Senior Synthesis Engineer PositionWe are seeking a seasoned Synthesis and Timing Constraint Expert to join our team. The ideal candidate will have extensive experience in leading synthesis and timing constraint projects from inception to delivery.Responsibilities:• Design and implement high-performance, low-power digital circuits using advanced EDA tools...

Key Responsibilities:As a seasoned Synthesis Engineer, you will be responsible for managing synthesis timing closure and physical verification closure.Proficient in handling large-scale designs with blocks exceeding 1M instances at frequencies above 1GHz.Experience in working with lower tech nodes (40nm, 28nm, 22nm, 20nm, 14nm, 10nm, etc.).Tapeout expertise...

Job DescriptionAs a Senior Engineer, you will lead a team of engineers in tackling complex design challenges in Logic Synthesis. This role involves collaborating with R&D to drive the roadmap for next-generation RTL2GDSII solutions and working closely with the design community to solve critical design problems. You will be responsible for deploying synthesis...

Synthesis and Timing Constraints EngineerWe are seeking a highly skilled Senior Synthesis/Constraints Engineer to lead our digital circuit design and verification efforts.Key Responsibilities:Synthesis and timing constraint engineering for block, subsystem, partition, and full-chip designs.Expertise in EDA tools such as Cadence Genus & Fishtail.Experience...

Job Opportunity">">**Job Description: **"> The Word-Level Synthesis Team is seeking an experienced software engineer to contribute to the development of innovative solutions for improving synthesis quality of results (QoR), performance, and logic interference. As a key member of this team, you will work closely with local and global teams to drive...

Hi All,Eximietas Hiring Senior Synthesis/Constraints.Experience: 8+ Years.Location: Bengaluru.Block / Subsystem / Partition / Full chip.• Role: Synthesis and Timing Constraint Engineer.• EDA Tool: Cadence Genus & Fishtail.• Node: TSMC 3nm / 5nm.• UPF Implementation hands-on is must.• Synthesis PPA optmimization, Hierarchical partition synthesis,...

Hi All,Eximietas Hiring Senior Synthesis/Constraints.Experience: 8+ Years.Location: Bengaluru.Block / Subsystem / Partition / Full chip.• Role: Synthesis and Timing Constraint Engineer.• EDA Tool: Cadence Genus & Fishtail.• Node: TSMC 3nm / 5nm.• UPF Implementation hands-on is must.• Synthesis PPA optmimization, Hierarchical partition synthesis,...

Hi All, Eximietas Hiring Senior Synthesis/Constraints. Experience: 8+ Years. Location: Bengaluru. Block / Subsystem / Partition / Full chip. • Role: Synthesis and Timing Constraint Engineer. • EDA Tool: Cadence Genus & Fishtail. • Node: TSMC 3nm / 5nm. • UPF Implementation hands-on is must. • Synthesis PPA optmimization, Hierarchical partition...