
Principal System Validator
2 weeks ago
The System Verification Engineer is responsible for developing and validating test methods for system-level verification, performing design verification testing, and preparing verification protocols. The ideal candidate will have a background in Electrical, Mechanical, ECE, Instrumentation, or Mechatronics engineering and experience in system-level V&V.
Key Responsibilities:
- Develop and validate Test Methods for system-level verification
- Perform Design Verification Testing and prepare verification protocols
- Utilize statistical analysis tools such as Minitab (Hypothesis Testing, Gage R&R, Confidence Interval Prediction)
- Apply DOE (Design of Experiments) and Statistical Process Control (SPC)
- Conduct Engineering Analysis, Impact Assessment, and Design Input/Output reviews
- Support Fixture Development and Qualification
- Execute System-level V&V (not software/HIL)
- Ensure compliance with Good Documentation Practices (GDP)
- Perform Measurement Systems Analysis (MSA) and CAD-based documentation
Preferred Background:
- Education: B.E/B.Tech in Electrical, Mechanical, ECE, Instrumentation (EIE), or Mechatronics
- Experience: 4–14 years in System-level V&V
- Industry Preference: Aviation / MedTech OEMs
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