Senior RTL Principal Design Engineer

15 hours ago


Mangalore, Karnataka, India beBeeRTL Full time ₹ 2,00,00,000 - ₹ 2,50,00,000
Principal Design Engineer - RTL Expert

We are seeking a highly skilled Senior RTL Principal Design Engineer to lead our team in designing and developing cutting-edge RTL solutions.

The ideal candidate will have extensive experience in RTL design, development, and verification, with a strong background in Verilog and SystemVerilog.

Key Responsibilities:

  • Design and develop high-quality RTL for complex IP blocks, including PCIe, CXL, and UALink solutions.
  • Collaborate closely with cross-functional teams to integrate RTL into larger system designs.
  • Analyze and resolve complex technical issues related to RTL implementation and verification.

Requirements:

  • BE/BTech/ME/MTech in Electrical / Electronics / VLSI with 8-16 years of core RTL Design experience using Verilog.
  • Strong understanding of SystemVerilog and UVM-based environment usage/debugging.
  • Prior experience in implementation of complex protocols and IP development teams is highly desirable.
  • Scripting knowledge is an added advantage.

We offer a dynamic work environment, opportunities for growth, and professional development. If you are a motivated and experienced engineer looking for a new challenge, we encourage you to apply.



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