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1 day ago
We're pioneering cutting-edge hardware engineering solutions by crafting environments to train AI agents on complex tasks.
This is an exciting opportunity to collaborate with leading researchers in one of the largest frontier labs, working on real-world semiconductor development challenges.
As a hardware engineer, you'll develop high-quality RTL design and verification problems that mirror industry complexity and best practices.
- Create realistic RTL design and verification problems using Verilog/SystemVerilog or VHDL
- Built containerized environments for agent training tasks in hardware design workflows
- Work directly with AI researchers to understand agent capabilities and training requirements
- At least 2 years of experience in RTL design
- Strong background in verification methodologies (UVM, SystemVerilog, testbench development)
- Experience with synthesis, timing analysis, and debugging tools
- Familiarity with industry-standard EDA tools (Synopsys, Cadence, Mentor Graphics)
- Problem-solving and analytical thinking
- Cross-functional collaboration for non-experts
- A curiosity about AI/ML applications in hardware design
- Ability to work independently in a remote environment
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