Senior Memory Layout Architect

3 days ago

Ajmer, Rajasthan, India beBeeLayoutEngineer Full time ₹ 30,00,000 - ₹ 50,00,000
Memory Layout Engineer Position

We are seeking an experienced memory layout engineer to develop high-quality memory compilers layouts and memory fast cache instances layouts for our next-generation cores, achieving outstanding performance per area (PPA).

Key Responsibilities:

  • Developing memory compilers layouts and memory fast cache instances layouts for next-generation cores.
  • Collaborating with cross-functional teams to identify design opportunities and implement layout improvements.
  • Designing and implementing new features and functionality in memory compilers and fast cache instances.
  • Providing technical expertise and guidance to junior engineers and designers.

Requirements:

  • Master's degree in electronic engineering or equivalent engineering degree from a university or engineering school.
  • Minimum 5 years of experience in SRAM/memory layouts creation and backend verifications including EMIR analysis.
  • Strong understanding of CMOS transistors, their behaviors, and CMOS logic design and layout.
  • Ability to create high-quality design rule-driven layouts and review schematics with engineering teams.

Nice To Have Skills:

  • Basic scripting languages, e.g., Perl/Python.
  • Experience working on Cadence or Synopsys flows.

Core Competencies:

  • Engineering demeanor and passion for circuit layouts.
  • Good interpersonal skills.
  • Capable of exploring possible floor planning options and proposing improvements.

Company Culture:

Our company values creativity, innovation, and collaboration. We believe in fostering a culture that encourages growth, learning, and teamwork. If you are passionate about memory layout engineering and want to work with a talented team, we encourage you to apply.

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