
Chief Architect of High-Performance Memory Solutions
1 day ago
We are seeking a highly skilled and experienced Memory Design Lead Engineer to join our team.
As a senior engineer, you will be responsible for leading our memory design team in developing high-performance memory compilers and Fast Cache instances for our next-generation Cores.
Your expertise in computer architecture and CMOS Transistor behaviors will enable us to achieve outstanding Power, Performance, and Area (PPA) metrics.
Key Responsibilities- Lead the development of high-performance memory compilers and Fast Cache instances
- Drive innovation and ensure that our products meet the highest quality standards
- Mentor junior engineers and provide guidance on circuit design
The successful candidate will have a minimum of 8+ years of experience in SRAM/margin/char/memory design with strong interpersonal skills and a passion for circuit design.
Requirements- Minimum 8+ years of experience in SRAM/memory design
- Strong understanding of computer architecture and CMOS Transistor behaviors
- Excellent interpersonal and leadership skills
The ideal candidate will have a deep understanding of computer architecture and concepts, basic understanding of CMOS Transistors and their behaviors, high-speed/low-power CMOS circuit design, clocking schemes, static and complex logic circuits, and power versus performance versus area trade-offs in typical CMOS design.
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