Asic Power Architect
4 weeks ago
**Minimum qualifications**:
- Bachelor's degree in Electronics or Computer Engineering/Science or equivalent practical experience.
- 5 years of experience in performance and power analysis.
- Experience with low power architectures and power optimization techniques.
- Experience with full product delivery cycle (e.g., definition, architecture, design and implementation, testing, productization).
**Preferred qualifications**:
- Knowledge of the impact of software and architectural design decisions on power and thermal behaviour of the system.
- Familiarity with ASIC design flows.
- Familiarity with Power Management Integrated Circuit (PMIC), Switched-Mode Power Supply (SMPS), Local Data Operation (LDO), and Power Delivery Networks.
**About the job**:
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.
**Responsibilities**:
- Define and drive low power solutions for Google SoCs to optimize Power-Performance-Area (PPA) under peak current and thermal constraints.
- Define power Key Performance Indicators (KPIs) and SoC/IP-level power goals, guide architecture, design and implementation to achieve power goals, and track power throughout the design cycle.
- Propose and drive power optimizations throughout the design process from concept to mass productisation.
- Perform algorithm development, modeling and analysis of various low power approaches. Model SoC and IP-level power and perform power rollups.
- Drive power-performance trade-off analysis for engineering reviews and product roadmap decisions.
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
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