Physical Design/Synthesis/STA AE Engineer

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

SoC Integration lead Enphase is looking for experienced SoC design engineers with SoC Logic Integration, Synthesis & STA closure experience to join our team in Bangalore India. The team is working on development of our next generation Control ASIC to production in 22nm technology. The ASIC will be a Mixed Signal SOC built around ARM microcontrollers. ...

Below are the open positions!!!STA : 4+ YearsExperience in chiptop / Top Level / Block level / Fullchip /#Tweaker #Tempus#Primetime#PDN / #IR_Drop / #EMIR : 3+ Yrs> Voltas, Redhawk_SC, EMIR, Power integrityPhysical Design: 4+ YrsExperience in Block level / Full chip /Top Level#Innovus #ICC2Synthesis: 3+ Yrs.Experience in Core Synthesis#Genus #Fusion...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block levelCo-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout.Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block levelCo-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout.Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

We are seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5-10 years of experience in digital ASIC design and timing closure. As a Senior STA Engineer, you will play a key role in ensuring the timing integrity and performance of our advanced semiconductor designs.Key Responsibilities :- Perform comprehensive static timing analysis...

Title: STA/Synthesis EngineerLocation: Bengaluru or HyderabadDescription:1. Performing Timing closure of partitions at SoC level2. Providing placement feedback with respect to timing3. Reduction of clock ID, by analyzing necessary tap points4. Providing clock pulls and pushes to attain better QoR before going to ECOs to reduce leakage/utilization impact5....

Minimum 4-8 years Experience in Physical Design engineeringExperience serving as Lead physical design engineer or SOC or block coordinator or top level integrator in TSMC 12m process and beyond requiredExperience running Synthesis-to-GDS ready flows, advanced timing flows and power-driven PD flows (e.g., multi-domain designs with a UPF/CPF flow) , Strong...

Job Description: Good knowledge in one of the domains -Synthesis with Synopsys / Cadence Tools.Formal Equivalence Checks.STA , Constraints Development.Scripting skills , TCL, Python would be added advantage.Working knowledge of all three domains. (Synthesis, Formal Equivalence, STA).

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block level Co-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block level Co-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Company DescriptionNikSperri Technologies Private Limited is a technology company focused on providing high-end services and value to its customers in India and globally. With expertise in RTL Design, Integration, Verification, STA-Synthesis, Physical Design, and tapeout, NikSperri can execute complete design projects based on specifications or existing...