STA Engineer

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for DFT Engineer to be based at Bangalore and Noida with the following: - Ideal candidate will have 3 to 10 years of experience in DFT for IP or SOC...

Job Description:We are seeking a skilled Physical Verification Engineer with 5 - 12 years of experience to join our team. The ideal candidate will have expertise in physical design implementation and signoff at the block level, particularly at 16/7nm technology nodes. Key responsibilities include floor planning, clock tree synthesis (CTS), static timing...

Physical Design : 5 to 12 Years Location - Bangalore, Hyderabad, Ahmedabad, NoidaRoles :- In Depth experience in Physical Design Implementation & Signoff at block level at 16/7nm technology nodes. - Good exposure in Floor planning, CTS, STA, Physical Verification, Basic understanding of timing constraints. - Good exposure to...

Job Description :- DFT Lead/Managerial experience of 7+ years.- Full-chip DFT leadership experience with multiple design Tape Outs- Create test architecture and test plans for complex ASICs and drive the Complete Chip DFT implementation & verification tasks- Proven working experience in Stuck-At, Compression, ATPG, MBIST, BSCAN/JTAG schemes implementation &...

About Company Profile :Sykatiya Technologies provides an extensive set of quality and timely VLSI Design, TEST Services & Specialized Solutions. These services range from a full turnkey solution that delivers a production-ready design, to sub-system or IP block development, or having our engineers augment your existing design teams with specialist design,...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

Hi FolksGreetings from Tech Mahindra!!Role: STAExp: 4 -8Location: Bangalore/ Kochi/ Ahemdabad / VizagAbout JobDeep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO) .Knowledge of timing corners/modes, process variations and signal integrity related issues are required.Experience in timing closure of high frequency blocks &...

Hi Folks Greetings from Tech Mahindra!! Role: STA Exp: 4 8 Location: Bangalore/ Kochi/ Ahemdabad / Vizag About Job Deep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO). Knowledge of timing corners/modes, process variations and signal integrity related issues are required. Experience in timing closure of high frequency blocks &...

STA Engineer with 5+ years’ experienceGood knowledge of timing closure knowledge for high frequency timing, congestion, and area sensitive designs.Can work closely with FE team for constraints development and constraints cleanup.Work with partitions/block owner to give timing ECO for timing closure.Knowledge of advanced timing closure techniques and...

Experience : 3+ to 5year Location : Bangalore Job Description : Requirements : Should have experience in setting up STA flow and methodology. Should have experience in block level STA and chip level STA. Should be able to automate the STA fixes. Should have good communication skills Should be able to work well within a team Bachelors or Masters...

Hi FolksGreetings from Tech Mahindra!!Role: STAExp: 4 8 Location: Bangalore/ Kochi/ Ahemdabad / VizagAbout JobDeep understating and experience of STA tool Tempus/PrimeTime /Tweaker/ DMSA(PTECO) .Knowledge of timing corners/modes, process variations and signal integrity related issues are required.Experience in timing closure of high frequency blocks &...

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

Dew Software is seeking a talented PV/STA Engineer to join our team. As a PV/STA (Post Verification/Silicon Test and Analysis) Engineer, you will be responsible for ensuring the quality and reliability of our semiconductor products. You will work closely with cross-functional teams, including design, test, and product engineering, to validate and analyze the...

Work Location: BangaloreSkills :4+ years of experience in STA.Well-versed with the timing closure (STA), timing closure methodologies.Pre/Post-layout constraint development to timing closure.Handshake with the design team and develop functional/DFT constraints.IP level constraint integration.Multi-voltage/Switching aware corner definitions.RC/C model...

Dear,I hope you are doing well! My name is Uma from the TA team at Harman, and I’m reaching out to you today to briefly introduce myself as well as personally extend this invitation to you on behalf of my company.Currently, we are looking to identify/invite exceptional talent like yourself, to join our Technical team at Harman.Job Description:PV + STA :...

Dear,I hope you are doing well! My name is Uma from the TA team at Harman, and I’m reaching out to you today to briefly introduce myself as well as personally extend this invitation to you on behalf of my company.Currently, we are looking to identify/invite exceptional talent like yourself, to join our Technical team at Harman.Job Description:PV + STA :...

Dear, I hope you are doing well! My name is Uma from the TA team at Harman, and I’m reaching out to you today to briefly introduce myself as well as personally extend this invitation to you on behalf of my company. Currently, we are looking to identify/invite exceptional talent like yourself, to join our Technical team at Harman. Job Description: PV + STA...

Dew Software, a leading player in the Digital Transformation space, is seeking a skilled Design Engineer specializing in STA (Static Timing Analysis), SD (Signal Integrity), Power, and PDN (Power Delivery Network) to join our team. Working with Fortune 500 companies to support their digital innovation and transformation strategies, the Design Engineer will...

Below are the open positions!!!STA : 4+ YearsExperience in chiptop / Top Level / Block level / Fullchip /#Tweaker #Tempus#Primetime#PDN / #IR_Drop / #EMIR : 3+ Yrs> Voltas, Redhawk_SC, EMIR, Power integrityPhysical Design: 4+ YrsExperience in Block level / Full chip /Top Level#Innovus #ICC2Synthesis: 3+ Yrs.Experience in Core Synthesis#Genus #Fusion...

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

Wipro HiringPrincipal / Staff / Sr. Staff Physical Design EngineersExperience : Min 8-18 Years.In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.· Should have experience on Physical Design Methodologies and sub-micron technology of...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job responsibilities: Assist in Cadence Genus/Innovus/Tempus (Digital Synthesis & Physical Design & Signoff Tools) development and validation; Develop test suites to ensure the good Synthesis/P&R/STA quality Review regression test...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Job responsibilities: Assist in Cadence Genus/Innovus/Tempus (Digital Synthesis & Physical Design & Signoff Tools) development and validation; Develop test suites to ensure the good Synthesis/P&R/STA quality Review regression...

Title: Physical Design EngineerDuration: FulltimeLocation: Bengaluru/HyderabadBelow refer the skill set:In-depth knowledge and hands-on experience on Netlist2GDSII Implementation i.e. Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification.Should have experience on Physical Design Methodologies and sub-micron technology...