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Design Implementation(Synthesis)
4 months ago
Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
Experience in handling complex data path oriented Multi-million gate synthesis. Working Knowledge on Physical synthesis using tools like Genus, Fusion Compiler
Experience in developing constraints for multi-clock domains hierarchical/flat timing analysis
Good working knowledge in multi-power domain synthesis and structural power checks using CLP.
Hands-on experience in Formal verification along with strong debugging skills for resolving issues/aborts.
Good working knowledge in Pre-lyt STA and analyzing timing reports and generating timing ECOs
Good knowledge on analyzing trade-offs and recipes for timing/area/power/congestion.
Exposure in TCL scripting for usage in Synthesis/STA
Knowledge on Hierarchical STA with Hyperscale is a plus
Good team player. Need to interact with the stakeholders proactively
Ability to debug and solve issues independently
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
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