Engineer, Design Verification
4 days ago
Job Posting Title: Engineer - Design Verification
:
End to End verification ownership of IP or Subsystem or SOC level Verification of complex microprocessor designs, neural nets and high-speed peripherals using leading edge verification methodologies. UVM testbench architecture development and implementation of DV flows, methodology Defining testplans, tests and verification methodology for block / subsystem and chip-level verification. Working with the design team in generating and reviewing testplans and closure of code and functional coverage Working with other verification team disciplines like emulation, FPGA and Firmware teams to determine correct functionality. Formal verification of IP’s and Subsystems NOC, Interconnect verification Performance verification and Performance analysis of complex SOCs end to end scenarios System level use case scenarios definition, coding and verification Innovating verification solutions to hit deliverable schedules. The chance to be exposed to and learn state of the art verification techniques such as formal, emulation, portable stimulus and virtual platforms. Come up with verification strategy for a product after going through product requirements and design specifications. B.Tech/M.Tech with 2+ years of industry experience in Digital Pre Silicon verification. Good understanding of SOC/Subsystem design concepts and design architectures. Hands on experience in developing, updating and debugging of Verilog, SV-UVM , SOC level testbenches is a must. Experience in closing the verification of block, subsystem level verification using industry standard metrics like code and functional coverage is a must. Expertise on NOC, Bus and Interconnect Verification. Coverage Analysis and improvements Test Bench, TB, environment, architect and implement verification flow and methodology Power aware verification with UPF, Power analysis and Power optimization Knowledge on Formal verification is an added advantage Gate level Simulation with timing annotated Strong knowledge of test-plan generation, coverage analysis transaction level modeling, pseudo and constrained random techniques with System Verilog In-depth knowledge of SV-UVM and debugging of testbenches is a must. Assertion and formal knowledge is an advantage. Knowledge of microprocessor cores such as ARM, RISC-V, Tensilica , Neural Network, GPU Cores is a plus. System Verilog, C/C++, System C, TCL/Python/shell-scripting Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe. Quick to adopt new technologies with good problem-solving skills. Job Req Type: ExperiencedRequired Travel: NoShift Type: 1st Shift/Days-
Principal Design Verification Engineer
4 weeks ago
bangalore, India Cadence Design Systems, Inc. Full timeAt Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. BE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 6+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals,...
-
bangalore, India Eximietas Design Full timeAbout Us: Eximietas Design is a leading technology firm specializing in (VLSI/Cloud Computing/Cyber Security/AI/ML) solutions. With a commitment to innovation and excellence, we empower businesses to thrive in the dynamic digital landscape. Our success is fueled by the expertise of our engineering leadership team, drawn from industry giants such as Google,...
-
Design Verification Engineer
3 weeks ago
bangalore, India TEKsystems Full timeKey Responsibilities: Develop and Implement Verification Strategies : Collaborate with design engineers to understand design specifications and develop comprehensive verification plans. Create and Maintain Testbenches : Use UVM to create modular, reusable testbenches that can verify various aspects of the design. Power-Aware Verification : Utilize UPF to...
-
Design Verification Engineer
2 weeks ago
bangalore, India Ms Angel and Genie Full timeDesign Verification Engineer (Pre Silicon Design)Location: BangaloreExperience: 6 to 12 yrsEmployment type: Full Time, permanentSalary : As per Market StandardKey Skills: Pre Silicon Design Verification UVM test BenchesPositions: IP/ SoC Verification Engineer / Senior Verification EngineerLocation: BangaloreExperience: 4- 8 YearsEmployment type: Full Time,...
-
Design Verification Engineer
2 weeks ago
bangalore, India Wipro Full timeWipro is currently hiring for enthusiastic Design verification engineers and the details are as below.Years of experience: 4 to 20 years.Area of expertise: system Verilog and UVM , OVM , CPU verification , IP and SOC level verification.Positions: Junior to Senior levelLocations: Bangalore, Hyderabad, Ahmedabad, Kochi and PuneJob description:. BE/ ...
-
Design Verification Engineer
2 weeks ago
bangalore, India Ms Angel and Genie Full timeDesign Verification Engineer (Pre Silicon Design) Location: Bangalore Experience: 6 to 12 yrs Employment type: Full Time, permanent Salary : As per Market Standard Key Skills: Pre Silicon Design Verification UVM test Benches Positions: IP/ SoC Verification Engineer / Senior Verification Engineer Location: Bangalore Experience: 4- 8 Years Employment type:...
-
Design Verification Engineer
2 weeks ago
bangalore, India Tech Mahindra Full timeHi Folks,We are hiring for Verification Engineer EngineerExp -3-7Location- Bangalore/ Hyderabad / Ahmedabad / Kochi/ VizagNP - Immediate-30 DaysJDDesign verification of IP-level, SoC -level and/or block-level/sub-system-level designsExperience in developing verification plan/verification methodology/flows from scratchHands-on expertise with UMV (or similar)...
-
Design Verification Engineer
4 weeks ago
bangalore, India Wipro Full timeGreetings from Wipro !!Wipro is currently hiring for enthusiastic Design verification engineers and the details are as below.Years of experience: 5 to 20 years.Area of expertise: system verilog and UVM, OVM, CPU verification, IP and SOC level verification.Positions: lead level Locations: Bangalore, Hyderabad.Job description:. BE/ B.Tech/ Master degree in...
-
Senior Design Verification Engineer
2 weeks ago
bangalore, India HARMAN India Full timeHarman India is looking for Senior Design verification Engineer for Bangalore location.Location: BangaloreSkill Set required:JD for Design Verification EngineerExperience Required: 5-10YearsResponsibilitiesVerification Planning: Develop detailed verification plans based on design specifications, outlining the verification strategy, methodologies, and tools...
-
Design Verification Engineer
4 weeks ago
bangalore, India Tech Mahindra Full timeExciting Opportunity for Senior Verification EngineerAre you a seasoned professional with over 3 years of experience in ASIC/FPGA verification? We're looking for a dynamic and skilled individual to join our team!Key Qualifications:Proven expertise in System Verilog and a MUST-have proficiency in UVM.Extensive hands-on experience in IP/Sub-system/SOC...
-
Design Verification Engineer
1 week ago
bangalore, India Eclectic Techno-Labs Full timeHiring for Design Verification Engineer Click below to apply for this position: UVM, SV, C/C++ based verification. Strong knowledge of SV/ UVM based debugging. Experience in constraint randomization based verification. Strong knowledge of UVM assertion based verification." ARM CPU based verification. Should have develop verification bench architecture,...
-
Design and Verification Engineer
4 weeks ago
bangalore, India Tech Mahindra Full timeHiring Design and Verification Engineers!Experience: 5-15 yearsLocation: Kochi/Ahmedabad/Bangalore/Vizag· Design verification of IP-level, SoC -level and/or block-level/sub-system-level designs· Experience in developing verification plan/verification methodology/flows from scratch· Hands-on expertise with UMV (or similar) methodology, and Verilog/System...
-
Senior Design Verification Engineer
3 weeks ago
bangalore, India HARMAN India Full timeHarman India is looking for Senior Design verification Engineer for Bangalore location. Location: Bangalore Skill Set required: JD for Design Verification Engineer Experience Required: 5-10Years Responsibilities Verification Planning: Develop detailed verification plans based on design specifications, outlining the verification strategy, methodologies,...
-
Design Verification Engineer
1 week ago
bangalore, India Analog Devices Full timeJob Description: The Engineering Enablement team is responsible for providing industry leading tools, methodologies, and support to engineering teams to accelerate product development across the company. This position is for an opening in the “Systems Verification and Validation team” within the Engineering Enablement organization in the CTO...
-
Design Verification Engineer
4 weeks ago
bangalore, India MediaTek Full timeJob DescriptionKey Qualifications•Preferably BE/B.Tech/ME/M.Tech in EEE/ECE/CSE with 5-12 years of relevant industry experience.•Should have experience in verification methodology.•Architecting and development of testbench, test-bench components for ISA features, clock/reset/power features of processor.•Strong assembly and CPU (x86/ARM/RISC-V)...
-
Design Verification Engineer
3 weeks ago
bangalore, India BITSILICA Full timeJob description Role & responsibilities 5 Years Experience As a Design Verification Engineer Experience in IP/Subsystem/SOC ASIC Verification. Hands-on expertise in working on Test Plans and test bench development. Expertise in writing test cases, simulation and debugging. Experience building a Verification Environment from scratch using...
-
Senior Design Verification Engineer
4 weeks ago
bangalore, India LeadSoc Technologies Pvt Ltd Full timeCompany DescriptionLeadSoC Technologies offers cutting-edge Engineering Design services in VLSI and Embedded Systems. With a focus on the Semiconductor, Automotive, Telecom, and Consumer Electronics segments, LeadSoC has been rapidly growing over the past 5 years. They provide end-to-end VLSI design services, including Micro Architecture to Tape Out and Post...
-
Design Verification Engineer
4 weeks ago
Bangalore City, India Wipro Full timeGreetings from Wipro !!Wipro is currently hiring for enthusiastic Design verification engineers and the details are as below. Years of experience: 5 to 20 years.Area of expertise: system verilog and UVM, OVM, CPU verification, IP and SOC level verification.Positions: lead level Locations: Bangalore, Hyderabad. Job description:. BE/ B.Tech/ Master degree in...
-
Staff Engineer, Design Verification
4 weeks ago
bangalore, India Analog Devices Full timeAnalog Devices is a leading global high-performance analog technology company dedicated to solving the toughest engineering challenges. We enable our customers to interpret the world around us by intelligently bridging the physical and digital with unmatched technologies that sense, measure, power, connect and interpret. The APW group within AES focuses on...
-
Design Verification Engineer
2 weeks ago
Bangalore/Hyderabad, India Talent Worx Full timeQualification Required : Typically requires minimum of 415 years of experience in System Verilog, UVM. Bachelors OR Master's Degree Engineering in Electronics or Electrical or Telecom or VLSI Engineering.Roles And Responsibilities :As a member of the design verification team, it is your job to break things. You will work with logic designers to test RTL...
