Sta/Synthesis Engineer

3+ years experience in STA/SynthesisHand-on Experience and Comprehensive knowledge of Synthesis and Static Timing Analysis.Hands-on experience on Logical aware Synthesis, Logical Equivalence check and Static Timing analysis.Hands-on the DMSA flow to fix pre and post STA timing.Knowledge on the Timing closure on Sub system level & Block level and Chip...

STA Engineers: Location: Bangalore/Hyderabad/Pune/Noida Responsibilities ·Ability to work with RTL design team to identify the must changes in RTL to coverage the timing and work with PD teams to analyze the post route timing & support the final timing closure. Drive the sign-off timing convergence for high performance designs. Work closely with block...

Below are the open positions!!!STA : 4+ YearsExperience in chiptop / Top Level / Block level / Fullchip /#Tweaker #Tempus#Primetime#PDN / #IR_Drop / #EMIR : 3+ Yrs> Voltas, Redhawk_SC, EMIR, Power integrityPhysical Design: 4+ YrsExperience in Block level / Full chip /Top Level#Innovus #ICC2Synthesis: 3+ Yrs.Experience in Core Synthesis#Genus #Fusion...

Our leading clients provide end-to-end support for the semiconductor industry.They are looking for Synthesis / STA to be based at Bangalore with the following skills:- Total 4 to 10 years of experience in Synthesis using Synopsys DC/ Cadence RTL Compiler based tool set- Expertise in Synthesis for High Performance, Low Power, Low Area based Flows- ...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block level Co-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout. Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest growing semiconductor services company.They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of...

We are looking for an STA Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?.Senior STA/Synthesis Engineer (Timing Constraint Manager product)Location: BangaloreExperience: 4yrs to 8yrsBachelor/Master in EE/CS with 4 years of relevant experienceProficiency with STA, and...

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

Key Skills : STA, Synthesis, Pnr, sign offAs a Physical Design Engineer at our company, you will play a crucial role in the design and implementation of advanced semiconductor products. You will be responsible for transforming logic designs into physical layouts that meet performance, area, and power targets. Your work will directly impact the success of our...

We are looking for an STA Engineer in Bangalore for the following role and with the given background/skill sets. Does this sound like a good role for you?. Senior STA/Synthesis Engineer (Timing Constraint Manager product) Location: Bangalore Experience: 4yrs to 8yrs Bachelor/Master in EE/CS with 4 years of relevant experience Proficiency with STA, and...

We are seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5-10 years of experience in digital ASIC design and timing closure. As a Senior STA Engineer, you will play a key role in ensuring the timing integrity and performance of our advanced semiconductor designs.Key Responsibilities :- Perform comprehensive static timing analysis...

SoC Integration lead Enphase is looking for experienced SoC design engineers with SoC Logic Integration, Synthesis & STA closure experience to join our team in Bangalore India. The team is working on development of our next generation Control ASIC to production in 22nm technology. The ASIC will be a Mixed Signal SOC built around ARM microcontrollers. ...

Job description:Work on 4nm/3nm sub-micron TechnologiesSynthesis of the Top level and Block levelCo-work with RTL and DFT engineers, prepare SoC Top/Block level constraintsDevelop Floor-planning and CTS guidelines for layout.Working experience with Physical Design will be an added advantage.Verify timing constraints with Time Vision.Analyze pre-layout and...

Job Description: Good knowledge in one of the domains -Synthesis with Synopsys / Cadence Tools.Formal Equivalence Checks.STA , Constraints Development.Scripting skills , TCL, Python would be added advantage.Working knowledge of all three domains. (Synthesis, Formal Equivalence, STA).

We are seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5-10 years of experience in digital ASIC design and timing closure. As a Senior STA Engineer, you will play a key role in ensuring the timing integrity and performance of our advanced semiconductor designs.Key Responsibilities :- Perform comprehensive static timing analysis...

We are seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5-10 years of experience in digital ASIC design and timing closure. As a Senior STA Engineer, you will play a key role in ensuring the timing integrity and performance of our advanced semiconductor designs.Key Responsibilities :- Perform comprehensive static timing analysis...

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Experience in handling complex data path oriented Multi-million gate synthesis. Working Knowledge on Physical synthesis using tools like Genus, Fusion Compiler Experience in developing constraints...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest-growing semiconductor services company.They are looking for STA Lead to be based at Bangalore and Noida with the following : - Ideal candidate will have 5 to 10 years of experience in field of...

Our client provides end to end semiconductor design services covering digital, analog, system design & embedded software. They are poised to be the fastest-growing semiconductor services company.They are looking for STA Lead to be based at Bangalore and Noida with the following : - Ideal candidate will have 5 to 10 years of experience in field of Synthesis,...