ASIC RTL Design engineer

Dear Candidate We, Cyient is hiring for ASIC RTL Design Engineer (Offshore-Onshore Model based Global Product Solution) Position. Base Location: Bangalore Experience Range: 3-5 Years Job Description: Good understanding of Verilog and design concepts Hands on experience in RTL coding and verification Good debugging skills Scripting experience is a...

Dear CandidateWe, Cyient is hiring for ASIC RTL Design Engineer (Offshore-Onshore Model based Global Product Solution) Position.Base Location: BangaloreExperience Range: 3-5 YearsJob Description:Good understanding of Verilog and design conceptsHands on experience in RTL coding and verificationGood debugging skillsScripting experience is a plusHands on...

4-8 yrs of experience in RTL design in Verilog, VHDLFPGA experienceXilinx or Altera/Intel or lattice or Microsemi FPGA toolsRTL debug experienceDatabase management between FPGA and ASIC RTLFamiliarity with front- end RTL tools (RTL Simulation, Synthesis, DFT, Timing)RTL Design modification/ adaptation for FPGA implementation (memories, IO, clocking etc....

Dear CandidateWe, Cyient is hiring for ASIC RTL Design Engineer (Offshore-Onshore Model based Global Product Solution) Position.Base Location: BangaloreExperience Range: 3-5 YearsJob Description:Good understanding of Verilog and design conceptsHands on experience in RTL coding and verificationGood debugging skillsScripting experience is a plusHands on...

ASIC RTL Design:General knowledge how things work in RTL team and be able to handle basic-to-mid level RTL tasks:RTL design/release flows/infra (LINT, CDC, UPF, IPXACT, CSR …)Good working knowledge in general scripting (Perl, Python, Make ...)Customer methodology/flow ask and complaints. Should be able to take up infra cleanup. Some good examples of infra...

Dear CandidateWe, Cyient is hiring for ASIC RTL Design Engineer (Offshore-Onshore Model based Global Product Solution) Position.Base Location: BangaloreExperience Range: 3-5 YearsJob Description:- Good understanding of Verilog and design concepts- Hands on experience in RTL coding and verification- Good debugging skills- Scripting experience is a plus- Hands...

Job Summary: As an RTL design lead, you will play a key role in the design and development of complex ASICs and System-on-Chip architectures for various electronic devices. You will be responsible for RTL design, establishing good design practices, translating micro-architecture to efficient RTL, optimizing performance, power efficiency, and area constraints...

ASIC RTL Engineer:EXP- 5+ yearsLocation- Bangalore.Description:- The selected engineer will be working with multiple teams in implementing new features and developing new IPs for multiple variants of RISCV based SoCs.- The engineers should be able to communicate effortlessly with different stakeholders in the project and should be handling the deliverables...

Senior Staff Engineer - RTL DesignLocation: Bangalore /PuneWe enable tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers,...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad A US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles. Responsibilities Principal / Senior Staff SoC/Chiplet RTL Integration Designer Responsibilities...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadA US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.ResponsibilitiesPrincipal / Senior Staff SoC/Chiplet RTL Integration DesignerResponsibilities...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadA US based well-funded product-based startup looking for Highly talented ASIC / RTL / Logic Design Engineers for the following roles.ResponsibilitiesPrincipal / Senior Staff SoC/Chiplet RTL Integration DesignerResponsibilities...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / Hyderabad Principal / Senior Staff IP Design Engineer: 2 Positions A US based well-funded product based startup looking for talented ASIC / RTL / Logic Design Engineers. A US based well-funded product-based startup looking for Highly...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadPrincipal / Senior Staff IP Design Engineer: 2 PositionsA US based well-funded product based startup looking for talented ASIC / RTL / Logic Design Engineers.A US based well-funded product-based startup looking for Highly talented...

Job Responsibilities:Work with chip architect to understand architecture concept and high level requirements Convert chip spec to RTL using internal and external IPsPlan and deliver RTL for continuous integration testingSupport the verification team to devise appropriate test plans and verification strategyJob Requirements:Experience in ASIC/SoC front-end...

Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara, California. / HyderabadPrincipal / Senior Staff IP Design Engineer: 2 PositionsA US based well-funded product based startup looking for talented ASIC / RTL / Logic Design Engineers.A US based well-funded product-based startup looking for Highly talented...

Hi folks,Greeting from Tech Mahindra!!!!!We are hiring for RTL architectJob Description:Senior RTL Design Architect / Lead – IP / SoC / ASIC DesignCandidate is expected to Define & Develop High Level / Micro Architecture design specification for a given Design requirementExperience with design & development of IP Protocols based on Layered Bus...

Job Title: Rtl Integration EngineerAt UST, we are seeking a highly skilled Rtl Integration Engineer to join our team.Job Responsibilities:Collaborate with chip architects to understand architecture concepts and high-level requirements.Convert chip specifications to RTL using internal and external IPs.Plan and deliver RTL for continuous integration...

Job Title: Synthesis and Static Timing Analysis - Senior Design EngineerLocation: Bangalore/Hyderabad/AhmedabadAs a Senior Design Engineer at Eteros Technologies, you will be responsible for leading the synthesis, static timing, and DFT efforts for an advanced mixed signal chip. You will be part of a highly talented team and will be at the heart of the Soc...

We are currently seeking experienced RTL Engineers- Minimum 4 years of experience required- Proficiency in RTL development from micro-architecture- Expertise in SoC, Memory, Peripheral, Security, and Cache IP’s Analysis & Integration- Skilled in RTL Quality checks including VCS, synthesis checks, LINT, LEC, CDC- Strong background in Failures Debug/Bug...