STA(Static Timing Analysis) Engineer
5 days ago
Experience : 5+years Location : BangaloreJob Description: As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners. Key Responsibilities: Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages. Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs. Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus). Collaborate with design and architecture teams to define timing requirements and resolve timing violations. Analyze timing scenarios, margins, and corner cases. Integrate third-party IPs and derive timing signoff requirements. Optimize timing paths and reduce signoff corners by merging modes. Automate STA flows using scripting languages. Support test mode timing closure (e.g., scan shift, scan capture, BIST). Primary Skills: Static Timing Analysis (STA):Deep expertise in STA tools like Synopsys PrimeTime, Cadence Tempus. Timing Constraints Development:Proficient in writing and validating SDC constraints. Scripting Languages:Strong skills in TCL, Perl, Python for automation. ASIC/SoC Design Knowledge:Understanding of synthesis, physical design, and backend flows. Corner and Mode Analysis:Experience with timing corners, process variations, and signal integrity. Constraint Debugging:Familiarity with tools like Synopsys GCA (Galaxy Constraint Analyzer). Secondary Skills: Tool Proficiency:Experience with tools like Genus, Timevision, Fishtail, Tweaker. Low-Power Design:Knowledge of UPF, multi-voltage domains, and power gating. Custom IP Integration:Handling of PLLs, SerDes, ADC/DAC, GPIO, HSIO. Communication & Collaboration:Strong interpersonal skills for cross-functional teamwork. Mentorship:Ability to guide and mentor junior engineers. Process Node Experience:Familiarity with advanced nodes (3nm, 5nm, 7nm, FinFET).
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Static Timing Analysis
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
3 days ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA(Static Timing Analysis) Engineer
2 weeks ago
New Delhi, India Capgemini Engineering Full timeExperience: 5+yearsLocation: BangaloreJob Description:As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process...
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Static Timing Analysis
3 weeks ago
Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) Engineer Job DescriptionJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with...
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STA Engineers
5 days ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
2 days ago
New Delhi, India Mirafra Technologies Full timeWe’re Hiring – STA Engineer (Tempus Experience) | #BangaloreJoin Mirafra Technologies, a leading name in VLSI design and innovation, and be part of a dynamic engineering team!Position: STA EngineerExperience: 4+ YearsLocation: BangaloreKey Skills & Responsibilities:- Strong working knowledge of Synthesis, LEC, and STA concepts. - Hands-on experience in...
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Senior/Staff STA Engineer
3 days ago
New Delhi, India Tenstorrent Full timeTenstorrent is looking for a skilled and detail-oriented Static Timing Analysis (STA) Engineer to help us deliver first-pass silicon success for our cutting-edge AI and RISC-V SoCs. Engineers with a strong foundation in Static Timing Analysis (STA) and timing constraints . In this role, you’ll lead timing closure efforts across block and full-chip levels,...
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Static Timing Analysis
4 days ago
New Delhi, India Mirafra Technologies Full timeWe’re Hiring – STA Engineer (Tempus Experience)|#Bangalore JoinMirafra Technologies , a leading name inVLSI design and innovation , and be part of a dynamic engineering team! Position:STA Engineer Experience:4+ Years Location:Bangalore Key Skills & Responsibilities: Strong working knowledge ofSynthesis, LEC, and STAconcepts. Hands-on experience...
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STA Lead Engineer
4 weeks ago
Delhi, India Mulya Technologies Full timeTITLE: STA Lead Engineer LOCATION: GREATER BENGALURU AREA Company Description With a strong focus on innovation and over two decades of experience, we deliver tailored AI-powered solutions across industries and global markets. JOB DESCRIPTION: Perform STA (static timing analysis) at full-chip level Specify timing ECOs either manually or via a...
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Senior STA Architect
5 days ago
New Delhi, India Eximietas Design Full timeHello All,Eximietas Design Hiring STA Engineers/Leads Experience: 10+ Years. Location: Bengaluru or Visakhapatnam or San Jose, Bay Area, & Austin, USA. Anyone with a Valid H1B or Already in US.Job Description: Experience in Static Timing Analysis (STA) for ASIC designs. Experience in developing timing constraints. Experience in timing closure and...
