STA(Static Timing Analysis) Engineer
4 weeks ago
Experience : 5+years Location : BangaloreJob Description: As an STA Engineer, you will be responsible for timing closure and verification of complex ASIC or SoC designs. You will work closely with cross-functional teams including physical design, logic design, and architecture to ensure timing requirements are met across various design stages and process corners. Key Responsibilities: Own full-chip and block-level timing closure across RTL, synthesis, and physical implementation stages. Develop and validate timing constraints (SDC) for blocks, partitions, and full-chip designs. Perform timing analysis using industry-standard tools (e.g., PrimeTime, Tempus). Collaborate with design and architecture teams to define timing requirements and resolve timing violations. Analyze timing scenarios, margins, and corner cases. Integrate third-party IPs and derive timing signoff requirements. Optimize timing paths and reduce signoff corners by merging modes. Automate STA flows using scripting languages. Support test mode timing closure (e.g., scan shift, scan capture, BIST). Primary Skills: Static Timing Analysis (STA):Deep expertise in STA tools like Synopsys PrimeTime, Cadence Tempus. Timing Constraints Development:Proficient in writing and validating SDC constraints. Scripting Languages:Strong skills in TCL, Perl, Python for automation. ASIC/SoC Design Knowledge:Understanding of synthesis, physical design, and backend flows. Corner and Mode Analysis:Experience with timing corners, process variations, and signal integrity. Constraint Debugging:Familiarity with tools like Synopsys GCA (Galaxy Constraint Analyzer). Secondary Skills: Tool Proficiency:Experience with tools like Genus, Timevision, Fishtail, Tweaker. Low-Power Design:Knowledge of UPF, multi-voltage domains, and power gating. Custom IP Integration:Handling of PLLs, SerDes, ADC/DAC, GPIO, HSIO. Communication & Collaboration:Strong interpersonal skills for cross-functional teamwork. Mentorship:Ability to guide and mentor junior engineers. Process Node Experience:Familiarity with advanced nodes (3nm, 5nm, 7nm, FinFET).
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Static Timing Analysis
4 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA Engineers
2 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob Summary The Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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STA Engineers
4 weeks ago
New Delhi, India LeadSoc Technologies Pvt Ltd Full timeStatic Timing Analysis (STA) EngineerJob SummaryThe Static Timing Analysis (STA) Engineer will own the timing sign-off and closure for complex integrated circuits (ICs) and/or System-on-Chips (SoCs). This role involves defining and validating timing constraints, performing multi-mode multi-corner (MMMC) timing analysis, and collaborating with design and...
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Static Timing Analysis
3 weeks ago
New Delhi, India Mirafra Technologies Full timeWe’re Hiring – STA Engineer (Tempus Experience) | #BangaloreJoin Mirafra Technologies, a leading name in VLSI design and innovation, and be part of a dynamic engineering team!Position: STA EngineerExperience: 4+ YearsLocation: BangaloreKey Skills & Responsibilities:- Strong working knowledge of Synthesis, LEC, and STA concepts. - Hands-on experience in...
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Static Timing Analysis
1 week ago
New Delhi, India Mirafra Technologies Full timeWe're Hiring – STA Engineer (Tempus Experience) | #BangaloreJoin Mirafra Technologies, a leading name in VLSI design and innovation, and be part of a dynamic engineering team!Position: STA EngineerExperience: 4+ YearsLocation: BangaloreKey Skills & Responsibilities:- Strong working knowledge of Synthesis, LEC, and STA concepts. - Hands-on experience in...
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Senior Physical Design Engineer
2 weeks ago
New Delhi, India L&T Technology Services Full timeLTTS is hiring for PD/STA Engineers with 7-10 years of experience.Job Location : BangaloreBelow is the job description... The PD/STA Engineer will be responsible for pre-design and static timing analysis tasks to ensure efficient silicon bring-up and product success. Day-to-day tasks include collaborating with design teams, performing timing analysis, and...
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STA Engineer
3 days ago
New Delhi, India ACL Digital Full timeRole: STA EngineerExperience: 3+ YearsLocation: Bangalore (Onsite)Notice Period: Immediate to 30 Days / Serving NoticeKey Responsibilities:- Perform Static Timing Analysis (STA) at block and full-chip levels across multiple design stages (synthesis, P&R, sign-off). - Develop, validate, and maintain timing constraints (SDC files) for complex SoC and IP-level...
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STA Engineer
2 weeks ago
New Delhi, India Mirafra Technologies Full timeExp 5-8Yrs relevant Location- GermanyDeliverables and Results: Timing and power Signoff data Digital timing and power sign-off guidelines Reports, analysis and scripts (perl/python) to improve MethodologyRequirements: A sound knowledge in digital chip design including timing, power and IR drop analysis and verification as well as functional simulation Deep...
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Static Timing Analysis
4 weeks ago
New Delhi, India Mirafra Technologies Full timeWe’re Hiring – STA Engineer (Tempus Experience)|#Bangalore JoinMirafra Technologies , a leading name inVLSI design and innovation , and be part of a dynamic engineering team! Position:STA Engineer Experience:4+ Years Location:Bangalore Key Skills & Responsibilities: Strong working knowledge ofSynthesis, LEC, and STAconcepts. Hands-on experience...
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Senior/Staff STA Engineer
4 weeks ago
New Delhi, India Tenstorrent Full timeTenstorrent is looking for a skilled and detail-oriented Static Timing Analysis (STA) Engineer to help us deliver first-pass silicon success for our cutting-edge AI and RISC-V SoCs. Engineers with a strong foundation in Static Timing Analysis (STA) and timing constraints . In this role, you’ll lead timing closure efforts across block and full-chip levels,...
