DFT Lead

Design for Testability (DFT) Engineer (Senior Level - 10+ years’ experience)Job Summary:We are seeking a highly accomplished Design for Testability (DFT) Engineer to join our elite team and lead the DFT efforts for our most critical ASIC and SoC projects. This senior-level position demands a mastery of DFT methodologies and the ability to drive the...

DFT Lead :Work Location - BangaloreExperience - 7+ YearsDesired Skills and Experience –· 7+ years of experience/concept on all aspects of DFT i.e. SCAN/ATPG, MBIST, Boundary Scan.· DFT logic integration and verification.· Experience in debugging low coverage and DRC fixes· Gate Level ATPG simulation with and without timing.· Pattern generation,...

Job Description-The candidate is expected to have clear understanding of IJTAG, P1500 protocols and should have hands on experience of at least one of these.The candidate is expected to have clear understanding of BSCAN,MBIST, SCAN, ATPG and Simulation concepts.Must be hands-on with MBIST insertion, Scan Insertion, ATPG pattern generation and simulations,...

Location: BangaloreExperience: 10+/12+/15+yrsMust Have Skills: DFT, Scan Insertion (Must), ATPG, JTAGRole Overview:We are looking for aDFT Leadwith deep expertise in scan insertion, ATPG, and JTAG to take ownership of DFT strategy and implementation across multiple SoC and ASIC projects. This role demands leadership, architectural decision-making, and...

Hiring DFT Lead (10–20 yrs) with expertise in ATPG, Scan/MBIST/JTAG, pattern validation, Synopsys/Cadence/Mentor tools, Perl/TCL scripting, and strong leadership skills. Required Candidate profileExperienced DFT Lead (10–20 yrs) skilled in ATPG, Scan/MBIST/JTAG, pattern validation, Synopsys/Cadence/Mentor tools, Perl/TCL scripting, debugging, and...

Lead Soc is hiring DFT LeadersHands on experience working in DFT with scan insertion.Good communication and analytical skills and Team handling.Experience: 9 years to 20 yearsLocation: BangalorePlease share your profile to for further discussion

Role : DFT LeadExperience: 5–9 yrs of experienceWork Location: BangaloreWork Mode: work from officeInterview process: 1 HR round , 2 Technical roundsShould be open for virtual and face to face interview as required by the clientResponsibilities:Lead scan insertion and ATPG flow for blocks.Review and optimize test coverage.Integrate DFT solutions and debug...

L&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.

Job Title:Lead DFT EngineerExperience:7+ YearsLocation:BangaloreEmployment Type:Full-timeIndustry:Semiconductors / ASIC / SoC DesignJob Summary:We are looking for aLead DFT Engineerto drive DFT architecture, planning, and implementation across complex SoC/ASIC designs. As a technical leader, you will mentor junior engineers, collaborate with cross-functional...

Job Title:Lead DFT EngineerLocation:BengaluruExperience:12+ YearsNotice Period: 30daysRole OverviewWe are seeking an experiencedLead DFT Engineerto drive the integration and optimization ofDesign-for-Test (DFT) architecturein our LiDAR SoCs. In this role, you will own DFT strategy, planning, implementation, and validation across our high-performance silicon...