DFT Lead Engineer

L&T Technology is hiring for Senior DFT Engineers / Lead DFT Engineer with 8-15 Years of experience. Job Location : Bangalore Skills Expertise should be : ATPG, SOC, ASIC DFT.

Job Requirements Job Title: Senior DFT Lead EngineerJob Type: Full-Time We are currently seeking a Senior DFT Lead Engineer with expertise in SCAN, ATPG, and BIST. As the ideal candidate, you will be responsible for leading the DFT efforts within our team, ensuring the successful implementation of design-for-test methodologies. Your role will involve...

Role: DFT LeadExperience:10+ yearsLocation: BangaloreSalary: Can be discussedJob DescriptionWe are looking for an energetic, passionate and process oriented DFT Leads who has extensive experience in planning, implementation and verification of DFT features for multiple SoC.Direct Responsibilities of the role, but not limited to,working on various aspects of...

DFT EngineerLocation: BangaloreNotice Period: 30 daysJob Description:We are looking for a skilled DFT Engineer with 3–5 years of experience in ASIC design and verification with a strong focus on Design-for-Test methodologies. You will be responsible for implementing and verifying DFT architectures to ensure high test coverage and manufacturability.Key...

Company DescriptionEteros Technologies is a 5-year-old company specializing in providing end-to-end semiconductor engineering services. Backed by 130+ years of combined leadership experience and 12+ successful tape-outs, we excel in Automotive, AI, and Datacenter SoC development. Our fast-growing customer base spans startups to large corporations globally,...

Purpose:The Design for Testability (DFT) engineering organization at L&T Semiconductor Technologies (LTSCT) pioneers innovative methods and technologies in the areas of DFT architecture, verification, and post-silicon bring-up of state-of-the-art semiconductor chips, such as System on a Chip (SoCs), developed using the latest semiconductor technology...

Experience: 10–15 YearsWe are looking for a highly experienced DFT Engineer with strong expertise in Mentor Graphics Tessent tools. The candidate should have deep hands-on experience across the full DFT flow—implementation, validation, debug—and be able to work independently on complex SoC designs.Key ResponsibilitiesPerform RTL insertion, DFT DRC...

Purpose of the Role:The Design for Testability (DFT) engineering organization at L&T Semiconductor Technologies (LTSCT) pioneers innovative methods and technologies in the areas of DFT architecture, verification, and post-silicon bring-up of state-of-the-art semiconductor chips, such as System on a Chip (SoCs), developed using the latest semiconductor...

DFT Engineer | 6-12 years| Bangalore ResponsibilitiesWill be responsible for Designing and Implementing DFT techniques.Should hava a good understanding of Memory BIST/Scan /OnChip Compression/At-speed Scan/Test-clocking/Boundary Scan/Analog Testing/Pin-muxing/LogicBIST on complex SOCs to improve testability.Test Modes implementation and verification, scan...

DFT - Senior/ Lead EngineerJob DescriptionScan insertion.SCAN DRC/ Coverage debug.ATPG Pattern generation.Gate level simulations ( Zero delay/Timing Delay simulations).Worked on JTAG/P1500 protocols.Perl/ Tcl scripting.Timing/ Formal verification/ PD flow knowledge is plus.Location: Bangalore