Lead ASIC-FPGA Verification Engineer
1 week ago
Job Description
Qualifications:As a leading global aerospace company, Boeing develops, manufactures and services commercial airplanes, defense products and space systems for customers in more than 150 countries. As a top U.S. exporter, the company leverages the talents of a global supplier base to advance economic opportunity, sustainability and community impact. Boeing's diverse team is committed to innovating for the future, leading with sustainability, and cultivating a culture based on the company's core values of safety, quality and integrity
Technology for today and tomorrow
The Boeing India Engineering & Technology Center (BIETC) is a 3000+ diverse engineering workforce that contributes to global aerospace growth. Our engineers deliver cutting-edge R&D, innovation, and high-quality engineering work in global markets, and leverage new-age technologies such as AI/ML, IoT, Cloud, Model-Based Engineering, and Additive Manufacturing, shaping the future of aerospace.
People-driven culture
At Boeing, we believe creativity and innovation thrives when every employee is trusted, empowered, and has the flexibility to choose, grow, learn, and explore. We offer variable arrangements depending upon business and customer needs, and professional pursuits that offer greater flexibility in the way our people work. We also believe that collaboration, frequent team engagements, and face-to-face meetings bring diverse perspectives and thoughts – enabling every voice to be heard and every perspective to be respected. No matter where or how our teammates work, we are committed to positively shaping people's careers and being thoughtful about employee wellbeing.
At Boeing, we are inclusive, diverse, and transformative.
With us, you can create and contribute to what matters most in your career, community, country, and world. Join us in powering the progress of global aerospace.
Position Overview
Boeing India Engineering seeks a Lead ASIC-FPGA Verification Engineer with considerable experience in design to support multiple product lines in commercial and defense electronics development.
Primary Responsibilities:
Use high-level architectural documentation along with algorithm description and implement functions for test bench architecture and design Develop models in System Verilog to verify design implementation and develop and run scripts and Makefiles Leads analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products Leads reviews of testing and analysis activity to assure compliance to requirements Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements Leads activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies Proficient in crafting verification plan IPs/Subsystems Coordinates engineering support throughout the lifecycle of the product. Plans research projects to develop concepts for future product designs to meet projected requirements Works under minimal direction Should Have exposure to SOI3 Audits and also have DO-254 Certification or trainingBasic Qualifications (Required Skills/Experience):
Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry is required 14 to 16 years of experience in Digital ASIC/FPGA verification. 4 or more years of concurrent exposure to Digital ASIC/FPGA Design.Preferred Qualifications (Desired Skills/Experience):
Experience leading development of architectural approaches from customer and system requirements. Experience identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements. Experience directing a team of engineers for technical excellence. Experience developing and leading sophisticated and high data rate design verification bench. Expert in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc. Expert in using Universal Verification Methodology (UVM): Experience crafting drivers, monitors, predictors, and scoreboards. Work experience crafting a self-checking simulation test bench from scratch for SoCs/ASIC/FPGA. Work experience performing clock cross domain analysis (CDC). Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors. In-hand depth upon System Verilog Work experience using Linux or Unix terminal commands. Experience using scripting languages: Make, Perl, Python, shell scripts, etc. Experience using Revision Control Systems: Subversion (SVN), CVS, Git. Good Understanding upon designing digital ASIC/FPGA architectural design documents (micro-architecture documents with timing diagrams, detailed design blocks, etc.). Good Understanding in deriving digital ASIC/FPGA requirements specification from higher-level (system or board-level) requirements specifications. Basic understanding upon concepts like RTL synthesis, Static Timing Analysis and correcting timing violations. Experience in Avionics protocols is a plus.Typical Education & Experience:
Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry with 14 to 16 years of experience & Master's degree with 12+ years of experience.
Relocation:
This position offers relocation based on candidate eligibility within INDIA.
Boeing is the world's largest aerospace company and leading manufacturer of commercial airplanes and defense, space and security systems. We are engineers and technicians. Skilled scientists and thinkers. Bold innovators and dreamers. Join us, and you can build something better for yourself, for our customers and for the world.
Relocation:
Relocation is available for eligible candidates, if authorizedExport Control Requirement:
Not an export control positionSafety Sensitive:
This is not a safety sensitive positionContingent Upon Award Program
This position is not contingent upon program awardExperience Level:
Individual Contributor - 4Job Type:
RegularJob Code:
6B1DI4 (64Y)-
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