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Fpga/asic Designer
1 week ago
Experience: 3+ Years
Location:
Bangalore
Primary Responsibilities:
- Develop models in SystemVerilog to verify design implementation and develop and run scripts and Makefiles.
- Analysis of customer and system requirements and development of architectural approaches and detailed specifications for various electronic products.
- Performs testing and analysis activity to assure compliance to requirements.
- Performs activities in support of functional verification, simulation, emulation, safety and other technical services/methodologies.
- Proficient in creating verification plan IPs/Subsystems.
- Coordinates engineering support throughout the lifecycle of the product.
- Team Player with mínimal guidance to conduct trade studies, literature research and basic engineering support throughout the life cycle of the product
Basic Qualifications (Required Skills/Experience):
- Bachelor, Master or Doctorate of Science degree from an accredited course of study, in engineering, computer science, mathematics, physics or chemistry
- 6 or more years" of experience in Digital ASIC/FPGA verification.
- 2 or more years' of concurrent exposure to Digital ASIC/FPGA Design.
Preferred Qualifications (Desired Skills/Experience):
- Bachelor's degree and 6 or more years' experience in digital ASIC/FPGA verification (concurrent design experiences for two plus years, Master's degree with 5 or more years' experience in digital design(mínimal)/verification, or PhD degree with 4 years of experience in digital design(mínimal)/verification.
- Experience in development of architectural approaches from customer and system requirements.
- Experience in identifying, tracking, and providing status of technical performance metrics to measure progress and ensure compliance with requirements.
- Experience in developing complex and high data rate design verification bench.
- Expert in writing Universal Verification Methodology (UVM) sequences and virtual sequences and its concepts like Inheritance, Polymorphism, etc.
- Expert in using Universal Verification Methodology (UVM): Experience creating drivers, monitors, predictors, and scoreboards.
- Work experience creating a selfchecking simulation test bench from scratch for SoCs/ASIC/FPGA.
- Expertise in verification working with internal/external VIPs, its development and evaluation with multiple vendors.
- Expertise in SystemVerilog language and verification concepts.
- Work experience using Linux or Unix terminal commands.
- Experience using scripting languages: Make, Perl, Python, shell scripts, etc.
- Experience using
Revision Control Systems:
Subversion (SVN), CVS, Git.
- Good Understanding upon designing digital ASIC/FPGA architectural design documents (microarchitecture documents with timing diagrams, detailed design blocks, etc.).
- Experience in Avionics protocols is a plus.
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