UVM Verification Specialist

Roles & Responsibilities:• To be part of a highly skilled ASIC Team working on the newest technology nodes• Responsible for overall IP/Block and sub-system verification from test plan creation, SystemVerilog/ UVM testbench development to signoff• Ensure first pass product through multi-dimensional verification coverage including mixed mode...

Job Description Job Description - Define and implement verification strategies and test plans for DDR memory interface designs. - Develop UVM/SystemVerilog-based testbenches and reusable verification components. - Perform protocol-level verification for DDR memory interfaces and validate compliance. - Collaborate with architecture, RTL, and system teams to...

Experience: 1-3 YearsLocation: HyderabadEducation: B.E./B.Tech. in ECE/EEERoles and ResponsibilitiesStrong expertise in UVM-based verification.Hands-on IP-level verification exposure and a solid understanding of serial protocols are a must.Share resumes at raksha.k@acldigital.com

Role Overview: You will be responsible for RTL verification and developing SV/UVM testbenches at Top/Sub-system/Block-levels. Your role will involve driving test plan and test spec development, executing tests, and generating relevant documents. Additionally, you will contribute to verification environment architecture and methodology development. The...

DV lead/manager Hyderabad About Us We are a technology consulting company delivering best-in class Chip Design Services. Founded in 2008, we partner with top semiconductor companies in building a connected, safer tomorrow. Chip Design Services Analog IP Design Foundation - Op Amp, Bandgap IOs - GPIO, I2 C, LVDS Clocking - PLL Power - LDO So C...

Over 8 years of digital IP verification, advanced knowledge of ASIC/SOC Design flow and state of the art verification flowProficient with Verilog, System Verilog and UVM.· Good in UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)· Good in defining and developing UVM based verification frameworks, testbenches, processes and flows.· Good in...

Over 4 years of experience in digital IP verification, with advanced knowledge of ASIC/SOC design flow and modern verification methodologies. About the Role Proficient in Verilog, SystemVerilog, and UVM. Strong understanding of UVM concepts and SystemVerilog features (SVA, UVM Scoreboard). Responsibilities Skilled in defining and developing UVM-based...

Over 4 years of experience in digital IP verification, with advanced knowledge of ASIC/SOC design flow and modern verification methodologies. About the Role Proficient in Verilog, SystemVerilog, and UVM. Strong understanding of UVM concepts and SystemVerilog features (SVA, UVM Scoreboard). Responsibilities - Skilled in defining and developing UVM-based...

Over 4 years of experience in digital IP verification, with advanced knowledge of ASIC/SOC design flow and modern verification methodologies. About the Role Proficient in Verilog, SystemVerilog, and UVM. Strong understanding of UVM concepts and SystemVerilog features (SVA, UVM Scoreboard). Responsibilities Skilled in defining and developing UVM-based...

Over 4 years of experience in digital IP verification, with advanced knowledge of ASIC/SOC design flow and modern verification methodologies. About the Role Proficient in Verilog, SystemVerilog, and UVM. Strong understanding of UVM concepts and SystemVerilog features (SVA, UVM Scoreboard). Responsibilities Skilled in defining and developing UVM-based...