Physical Design Engineer

Responsibilities :  Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization.  Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys ICC2, Cadence Innovus).  Collaborate with the design and CAD teams to improve PD workflows,...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

Minimum 15 years of ASIC physical design experience Minimum 5 years of management experience with leading a physical design and implementation teams from RTL-to-GDSII Should have excellent collaboration and teamwork capabilities across various chip development disciplines. Will be responsible to hire talent and mentor, build expertise, and grow each team...

Minimum 15 years of ASIC physical design experienceMinimum 5 years of management experience with leading a physical design and implementation teams from RTL-to-GDSIIShould have excellent collaboration and teamwork capabilities across various chip development disciplines. Will be responsible to hire talent and mentor, build expertise, and grow each team...

Responsibilities : Minimum 8+ years of experience and with 0 - 30 Notice period Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and areatargets. Perform efficient Clock planning and distribution to...

Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...

Responsibilities:  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and areatargets.  Perform efficient Clock planning and distribution to...

Should be able to handle Full chip hashtag Added advantage for #Innovus with Minimum 4 years #PnR (timing/congestion/CTS issues), understanding of hashtag #IO ring, #package support, multi hashtag #voltage design. Deep understanding of the concepts related to hashtag #synthesis , place & route, hashtag #CTS , timing convergence, IR/EM checks and...

Should be able to handle Full chip hashtagAdded advantage for #Innovus with Minimum 4 years #PnR (timing/congestion/CTS issues), understanding of hashtag#IO ring,#package support, multi hashtag#voltage design.🔸Deep understanding of the concepts related to hashtag#synthesis, place & route, hashtag#CTS, timing convergence, IR/EM checks and signoff DRC/LVS...

We need an experienced Physical Design Engineer to join our APP team. The candidate should have a strong background in back-end design of ASIC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements 1 - 2 Years of experience in physical design Bachelor’s or master’s degree in...

We need an experienced Physical Design Engineer to join our ATD team. The candidate should have a strong background in back-end design of ASIC/So C chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field. Requirements 1 - 2 Years of experience in physical design Bachelor’s or master’s...

We need an experienced Physical Design Engineer to join our APP team. The candidate should have a strong background in back-end design of ASIC chips. The ideal candidate will have a bachelor’s or master’s degree in Electrical Engineering or a related field.Requirements1 - 2 Years of experience in physical designBachelor’s or master’s degree in...

Job Title: Physical Design Engineer Location: Bangalore/ Hyderabad Job Summary: We are seeking a skilled and detail-oriented Physical Design Engineer to work on the physical implementation of complex ASICs and So Cs. The role involves performing various backend design tasks, including floorplanning, placement, routing, timing closure, and power...

Deep understanding of the concepts related to synthesis, placement & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure. ● Responsible for independent planning and execution of all aspects of physical design including floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction, Timing closure, Power and...

Deep understanding of the concepts related to synthesis, placement & route, CTS, timingconvergence, IR/EM checks and signoff DRC/LVS closure.● Responsible for independent planning and execution of all aspects of physical designincluding floor planning, place and route, Clock Tree Synthesis, Clock Distribution, extraction,Timing closure, Power and Signal...

Role : Physical Design Engineer ( Physical Verification) Experience Level : 5 to 8 yrs This position is for a senior-level physical verification engineer who will work on Physical verification of a complex SOC/Cores/Blocks DRC, LVS, ERC, ESD, DFM, Tapeout Work hands-on to solve critical design and execution issues related to physical verification and...

LTTS is hiring for Physical Design Engineers with 5+ Years of experience. Job Location : Bangalore, India Job description is as below :: Top 5 Required Skills/Mandatory skills 1. Synthesis 2. Constraints Management 3. Logic Equivalence Check 4. CLP 5. STA Required Education: Bachelor's degree in Computer Science, Electrical/Electronics...

LTTS is hiring for Physical Design Engineers with 5+ Years of experience. Job Location : Bangalore, IndiaJob description is as below ::Top 5 Required Skills/Mandatory skills 1. Synthesis 2. Constraints Management 3. Logic Equivalence Check 4. CLP 5. STA Required Education: Bachelor's degree in Computer Science, Electrical/Electronics Engineering,...

Role : Physical Design Engineer ( Physical Verification)Experience Level : 5 to 8 yrsThis position is for a senior-level physical verification engineer who will work on Physical verification of a complex SOC/Cores/Blocks DRC, LVS, ERC, ESD, DFM, Tapeout Work hands-on to solve critical design and execution issues related to physical verification and sign-off....