Senior Physical Design Engineer

4 days ago


Bangalore, India Eximietas Design Full time

Responsibilities :

 Minimum 8+ years of experience and with 0 - 30 Notice period

 Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High

Speed Advance ASICs.

 Define and drive physical design strategies to meet aggressive performance, power, and area

targets.

 Perform efficient Clock planning and distribution to entire grid with the use of Mesh or CTS

 Conduct detailed analysis of timing, power, and area, and drive design optimizations to

improve QoR.

 Signoff closure support for STA, PV, LEC, IR/EM, CLP very efficiently.

 Work closely with RTL design and DFT teams to understand design requirements and

constraints, and drive successful tapout of complex designs.

 Support and Development of advanced physical design methodologies and flows for complex

semiconductor designs.

Requirements :

 Bachelor's or Master's degree in Electrical Engineering or Electronics & Communications.

 Proficiency in industry-standard EDA tools from Cadence, Synopsys and Mentor Graphics for

Synthesis, PnR, Signoff Closure.

 Strong scripting skills using TCL, Python, or Perl for design automation and tool customization.

 Excellent problem-solving and analytical skills, with a track record of delivering high-quality

designs on schedule.

 Outstanding communication and interpersonal skills, with the ability to collaborate

effectively in a team environment.

 Proven ability to Engineer and mentor junior engineers, fostering their professional growth

and development.

Preferred qualifications:

 Experience with advanced process nodes 3nm, 5nm, 7nm, 10nm including knowledge of

FinFET technology.

 Expertise in Synthesis that includes details understanding of RTL, Early PnR timing issues, Constraint issue, design issues.

 Experience in handling Partitions and blocks for size estimation, pin assignment, CTS.

 Knowledge on Handling various custom IP such as PLL, Divider, Serdes, ADC, DAC, GPIO, HSIO for PD integration at block level.

 Detailed Knowledge on Clocking methodology and various techniques to improve skew,

latency, timing, power.

 Familiarity with low-power design techniques and methodologies, such as multi-voltage

domains and power gating using UPF.

 Expertise in physical verification, including DRC, Antenna, LVS, LEC and ERC checks.

 Expertise in Timing Closure including setup, hold, DRV, SI, Interface issues.

 Experience and good understanding in various foundries and their Backend implementation

requirement.



  • Bangalore, India Eximietas Design Full time

    Responsibilities :  Develop and support automated physical design (PD) CAD flows, including floorplanning, placement, and routing optimization.  Customize and optimize physical design flows using industry-standard EDA tools (such as Synopsys ICC2, Cadence Innovus).  Collaborate with the design and CAD teams to improve PD workflows,...


  • bangalore, India Eximietas Design Full time

    Responsibilities : Minimum 8+ years of experience and with 0 - 30 Notice period Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs. Define and drive physical design strategies to meet aggressive performance, power, and areatargets. Perform efficient Clock planning and distribution to...


  • bangalore, India Eximietas Design Full time

    Responsibilities :  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for High Speed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and area targets.  Perform efficient Clock planning and...


  • bangalore, India Eximietas Design Full time

    Responsibilities:  Minimum 8+ years of experience and with 0 - 30 Notice period  Perform Synthesis, floorplanning, placement, Clock, routing, and PPA optimization for HighSpeed Advance ASICs.  Define and drive physical design strategies to meet aggressive performance, power, and areatargets.  Perform efficient Clock planning and distribution to...


  • Bangalore Metropolitan Area, India Mulya Technologies Full time

    Job Title: Senior Physical Design EngineerJob Summary: We are seeking a skilled Senior Physical Design Engineer to drive the required digital backend flows and create our designs. The ideal candidate will have experience in physical design, recent successful tapeouts in deep submicron technology, and FinFet technology.Key Responsibilities:Physical design...


  • Bangalore, India Mulya Technologies Full time

    Senior Pn R (Place and Route) Engineer Bangalore Senior Pn R (Place and Route) Engineer Bangalore Full-Time / We are looking for a experienced place-and-route engineer, who is capable of driving the required digital backend flows to create our designs. The ability to work closely with rtl design team to understand partition architecture and drive...


  • bangalore, India Modernize Chip Solutions (MCS) Full time

    Minimum 15+ Years of experience SoC Physical Design. Skills – have working experience in advanced FinFET node designs 7nm/5nm/3nm. Experience with Cadence/Synopsys PnR/STA tools and Calibre; good scripting/automation skills is a must. This position is for a senior-level physical design engineer who will work on Floor planning/Bump Planning/ Pin...


  • Bangalore, India EInfochips Full time

    Job Role: Physical Design Engineer- Senior/Lead Location: Bangalore, Hyderabad, Noida and Ahmedabad Experience Required: 5+ ROLE & RESPONSIBILITIES Engineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal...


  • bangalore, India L&T Semiconductor Technologies Full time

    Role : Physical Design Engineer ( Physical Verification) Experience Level : 5 to 8 yrs This position is for a senior-level physical verification engineer who will work on Physical verification of a complex SOC/Cores/Blocks DRC, LVS, ERC, ESD, DFM, Tapeout Work hands-on to solve critical design and execution issues related to physical verification and...


  • Bangalore, India L&T Semiconductor Technologies Full time

    Role : Physical Design Engineer ( Physical Verification) Experience Level : 5 to 8 yrs This position is for a senior-level physical verification engineer who will work on Physical verification of a complex SOC/Cores/Blocks DRC, LVS, ERC, ESD, DFM, Tapeout Work hands-on to solve critical design and execution issues related to physical verification and...


  • Bangalore, India Modernize Chip Solutions Full time

    Minimum 15+ Years of experience So C Physical Design. Skills – have working experience in advanced Fin FET node designs 7nm/5nm/3nm. Experience with Cadence/Synopsys Pn R/STA tools and Calibre; good scripting/automation skills is a must. This position is for a senior-level physical design engineer who will work on Floor planning/Bump Planning/ Pin...


  • bangalore, India Wipro Full time

    Senior Physical Design Engineer:Exp-5+yrsKEY RESPONSIBILITIES:- Lead the team responsible for Synthesis, Physical Design, timing and Physical closure- Manage a large team of internal and external resources- Responsible for ensuring the completion of the SOC chip on schedule with high QOR- Physical implementation of block level and subsystem level- Contribute...


  • Bangalore, India Wipro Full time

    Senior Physical Design Engineer: Exp-6+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level ...


  • bangalore, India Wipro Full time

    Senior Physical Design Engineer:Exp-5+yrsKEY RESPONSIBILITIES:Lead the team responsible for Synthesis, Physical Design, timing and Physical closureManage a large team of internal and external resourcesResponsible for ensuring the completion of the SOC chip on schedule with high QORPhysical implementation of block level and subsystem levelContribute to...


  • bangalore, India Wipro Full time

    Senior Physical Design Engineer:Exp-5+yrsKEY RESPONSIBILITIES:- Lead the team responsible for Synthesis, Physical Design, timing and Physical closure- Manage a large team of internal and external resources- Responsible for ensuring the completion of the SOC chip on schedule with high QOR- Physical implementation of block level and subsystem level- Contribute...


  • Bangalore, India Wipro Full time

    Senior Physical Design Engineer: Exp-6+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level Contribute...


  • Bangalore, India Wipro Full time

    Senior Physical Design Engineer: Exp-6+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem level ...


  • Bangalore, India Wipro Full time

    Senior Physical Design Engineer: Exp-6+yrs KEY RESPONSIBILITIES: Lead the team responsible for Synthesis, Physical Design, timing and Physical closure Manage a large team of internal and external resources Responsible for ensuring the completion of the SOC chip on schedule with high QOR Physical implementation of block level and subsystem...


  • bangalore, India L&T Semiconductor Technologies Full time

    Role : Physical Design Engineer ( Physical Verification)Experience Level : 5 to 8 yrsThis position is for a senior-level physical verification engineer who will work on Physical verification of a complex SOC/Cores/Blocks DRC, LVS, ERC, ESD, DFM, Tapeout Work hands-on to solve critical design and execution issues related to physical verification and sign-off....


  • bangalore, India eInfochips (An Arrow Company) Full time

    Job Role: Physical Design Engineer- Senior/LeadLocation: Bangalore, Hyderabad, Noida and AhmedabadExperience Required: 5+ROLE & RESPONSIBILITIESEngineer will be responsible for floor-planning, timing constraints, physical synthesis, formal verification, clock tree optimization, routing, extraction, timing closure, DFT, Antenna fixing &signal integrity, Power...