Design Verification
3 weeks ago
PCIe Verification: Lead the verification of PCIe (PCI Express) interface designs, ensuring compliance with PCIe protocol standards (e.g., PCIe Gen 3/4/5/6, USB3, etc.).Testbench Development: Develop and implement scalable, reusable, and efficient testbenches for PCIe designs using SystemVerilog, UVM (Universal Verification Methodology), and other industry-standard verification methodologies.Protocol Compliance: Ensure that the PCIe designs conform to PCIe protocol specifications, including transaction layers, link training, error handling, and power management.Verification Plan Creation: Create detailed verification plans for PCIe designs based on specifications and requirements, ensuring full coverage and correctness of the design.Simulation & Debugging: Perform simulations and debugging using tools like Questa, VCS, or ModelSim to identify design issues. Use advanced debugging techniques, including waveform analysis and code coverage, to ensure design correctness.Regression Testing: Set up and manage regression testing for continuous validation of PCIe functionality, tracking and resolving any failures.Verification Coverage: Ensure thorough verification of all design corner cases, including protocol edge cases, power states, and interoperability scenarios. Achieve high coverage metrics (code, functional, and protocol coverage).Formal Verification: Implement and use formal verification techniques to ensure correctness of the most critical PCIe components, such as link establishment, transaction layer, and error recovery mechanisms.
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Senior Design Verification Engineer
5 days ago
Bangalore Urban, India UST Full timeJob Description: As a Sr. SoC Design Verification Engineer, you will be responsible for Design for Debug architecture verification related tasks including creating test cases and test bench using UVM methodology. Capacity could include full chip and/or system functional verification with defining verification strategies, methodology and test plan to enable...
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Senior Design Verification Engineer
5 days ago
Bangalore Urban, India UST Full timeJob Description:As a Sr. SoC Design Verification Engineer, you will be responsible for Design for Debug architecture verification related tasks including creating test cases and test bench using UVM methodology. Capacity could include full chip and/or system functional verification with defining verification strategies, methodology and test plan to enable...
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Design Verification Lead
3 weeks ago
Bangalore Urban, India Mirafra Technologies Full timeMirafra Technologies hiring for a Design Verification Engineer with min 7+Yrs Experience.Location-Bangalore/HyderabadQualification-BE/B Tech/M Tech1. Must Have: SoC or IP Verification2. Experience Languages: System Verilog3. Methodologies: OVM/UVM/VMM4. Protocols: PCIE/DDR/Ethernet/UFS/CHI5. Processor/ARM Based SoC Verification experience6. Candidate must...
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Bangalore Urban, India UST Full timeJob Responsibility Pre-silicon system verification. This include SoC, FPGA & Full Chip design verification. Create testcase and testbench with UVM methodology Fullchip/system functional verification, by defining verification strategies/methodology and test plan to enable effective verification Coordinate/interface cross functional efforts with Design, SW,...
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Design Verification
1 week ago
Bangalore Urban, India ACL Digital Full timePCIe Verification: Lead the verification of PCIe (PCI Express) interface designs, ensuring compliance with PCIe protocol standards (e.g., PCIe Gen 3/4/5/6, USB3, etc.). Testbench Development: Develop and implement scalable, reusable, and efficient testbenches for PCIe designs using SystemVerilog, UVM (Universal Verification Methodology), and other...
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Bangalore Urban, India UST Full timeJob ResponsibilityPre-silicon system verification. This include SoC, FPGA & Full Chip design verification.Create testcase and testbench with UVM methodologyFullchip/system functional verification, by defining verification strategies/methodology and test plan to enable effective verificationCoordinate/interface cross functional efforts with Design, SW,...
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Senior Design Verification Engineer
1 week ago
Bangalore Urban, India L&T Technology Services Full timeSoC/SS Lead Engineers : Experience in development of UVM based verification environments from scratch. Experience with Design verification of ta-center applications like Video, AI/ML and Networking designs. Experience in Mercurial (Hg), Git or SVN. Experience with low power design. Experience working across and building relationships with cross-functional...
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Senior Design Verification Engineer
3 weeks ago
Bangalore Urban, India L&T Technology Services Full timeSoC/SS Lead Engineers : Experience in development of UVM based verification environments from scratch. Experience with Design verification of ta-center applications like Video, AI/ML and Networking designs. Experience in Mercurial (Hg), Git or SVN. Experience with low power design. Experience working across and building relationships with cross-functional...
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Verification Lead Design Engineer
1 week ago
bangalore, India Cadence System Design and Analysis Full timeBE/BTech/ME/MTech - Electrical / Electronics / VLSI with an experience as a design and verification engineer. 5+ years of Design Verification experience with SV/UVM Strong background on functional verification fundamentals, environment planning, test plan generation, environment development is a must. Design Verification experience verifying complex designs...
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Design Verification Engineer
1 week ago
Bangalore Urban, India ACL Digital Full timeDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: Develop and implement scalable, reusable, and efficient verification environments and testbenches for DDR designs using SystemVerilog, UVM (Universal...
