physical verification engineer

Skills/Experience: Hands on debugging skills in different physical verification checks like LVS, DRC, ERC, PERC, Antenna, ESD and DFM using Calibre, ICV and Pegasus PV tools Knowledge of basic device physics and PV fixing using various PnR tools like Innovus/ICC2 is required. Working experience in cutting edge technologies such as 3/4/5nm and 7nm process...

Key Responsibilities: Perform physical verification at the SoC, core, and block levels, including DRC, LVS, ERC, ESD, DFM, and tapeout tasks. Address complex physical design challenges related to sign-off and ensure timely resolution. Maintain deep understanding of physical verification workflows and methodologies across RTL to GDS2. Collaborate with...

NoC Verification Engineer Experience : 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like AXI4, CHI-B/C/E,...

Job Title: Formal Verification EngineerLocation: Bangalore Experience: 4+Years Job Type: Full-time Industry: Semiconductor / ASIC Design / EDA Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer EngineeringJob Description:We are looking for a highly motivated Formal Verification Engineer to join our Design Verification team. The candidate will be...

Job Title: Functional Verification Engineer Location: Bangalore Experience: 4+ Years Job Type: Full-time Industry: Semiconductor / VLSI / ASIC Design Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer Engineering Job Description: We are seeking a skilled and detail-oriented Functional Verification Engineer to be part of our IP/SoC...

Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job Title:Formal Verification Engineer Location:Bangalore Experience:4+Years Job Type:Full-time Industry:Semiconductor / ASIC Design / EDA Education:B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer Engineering Job Description: We are looking for a highly motivatedFormal Verification Engineerto join our Design Verification team. The candidate will be...

Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Job DescriptionIP/ SoC Verification Engineer\nJob Description:\n\n Must have good knowledge on the verification flows.\n Excellent hands-on debug skills and problem solving attitude..\n Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC\n Experience of working on Functional Verification, SoC Verification, Emulation.\n...

Job Title :IP Verification Engineer – UVM verification Exp Level:4+ yrs Location:Bangalore/Hyderabad Job Description:System Verilog based UVM Functional verification, Behavioral modelling of functional blocks. System level performance verification, traffic patterns, bandwidth & latency analysis. Expertise in AXI4 bus protocol. Experience in Network On Chip...

Experience: 5 Years Location: Bangalore/Hyderabad Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics Roles and Responsibilities DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: ...

NoC Verification Engineer Experience : 7 to 14 Years Key Responsibilities: Develop UVM-based verification environments for NoC/IP blocks such as FlexNoC, GNOC, or custom NoC fabrics. Define and implement test plans, coverage models, scoreboards, monitors, and checkers for coherent and non-coherent traffic. Integrate and verify IPs like AXI4,...

Experience: 5 YearsLocation: Bangalore/HyderabadEducation: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/ElectronicsRoles and ResponsibilitiesDDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols.Testbench Development: Develop and...

Formal Verification Engineer Experience: 4 to 12 YearsLocation: BangaloreJob DescriptionResponsible for developing and executing formal verification strategies for IP and SoC blocks.Write and prove assertions using SystemVerilog Assertions (SVA) or PSL.Use tools like JasperGold, VC Formal, or OneSpin to verify complex designs.Collaborate with design and DV...

Job Title: Functional Verification EngineerLocation: Bangalore Experience: 4+ Years Job Type: Full-time Industry: Semiconductor / VLSI / ASIC Design Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer EngineeringJob Description:We are seeking a skilled and detail-oriented Functional Verification Engineer to be part of our IP/SoC verification team. The...

Job Title: Functional Verification EngineerLocation: Bangalore Experience: 4+ Years Job Type: Full-time Industry: Semiconductor / VLSI / ASIC Design Education: B.E./B.Tech or M.E./M.Tech in ECE/EEE/Computer EngineeringJob Description:We are seeking a skilled and detail-oriented Functional Verification Engineer to be part of our IP/SoC verification team. The...

Experience: 5 Years Location: Bangalore/Hyderabad Education: B.E/B.Tech in ECE/EEE or M.E/M.Tech in VLSI/Electronics Roles and Responsibilities DDR Verification: Lead the verification of DDR memory controller and PHY designs, ensuring compliance with DDR standards such as DDR3, DDR4, DDR5, and other memory interface protocols. Testbench Development: ...

IP/ SoC Verification EngineerJob Description: Must have good knowledge on theverificationflows. Excellent hands-ondebugskills and problem solving attitude.. Experience of working in complex test-bench/model inVerilog , System Verilog orSystemC Experience of working onFunctionalVerification, SoC Verification, Emulation. Good in programming :System Verilog ,...

Design Verification Engineer - Senior / Lead / Sr. LeadJob Description: Must have good knowledge on the verification flows. Excellent hands-on debug skills and problem solving attitude.. Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC Experience of working on Functional Verification, SoC Verification, Emulation Good in...

Formal Verification EngineerExperience : 4 to 12 Years Location : BangaloreJob Description Responsible for developing and executing formal verification strategies for IP and SoC blocks. Write and prove assertions using SystemVerilog Assertions (SVA) or PSL. Use tools like JasperGold, VC Formal, or OneSpin to verify complex designs. Collaborate with design...