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AMS Verification Engineer
4 weeks ago
Modelling of analog blocks
SV-RNM
Verilog-AMS
Schematic based structural models (macro models)
System C
Familiarity with Analog/Mixed-Signal/RF design architectures and debug experience with schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision. Chip-top co-simulation with tools such as Cadence ADE/Cadence AMSD with Spectre as the analog solver and Xcelium as the digital solver. Experience and debug with digital simulators such as Cadence Xcelium/Synopsys VCS. Experience with Spice/Fast Spice simulators such as Spectre Ultrasim/APS/XPS. Experience with SV/UVM (agent creation, env building, score-boarding, RAL etc.). Experience with simulation emulation accelerators. Tracking of verification metrics and regression management, Metric Driven Verification (MDV) framework using tools such as Cadence vManager. Experience with languages/tools/software relating to product development is an added advantage.
C, C++, System C, AMS
Automation with scripting languages: Python/Perl/Shell etc.
Embedded programming for on-chip micros or separate MCU’s
Matlab/Simulink for system level simulations and modeling
Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days-
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