AMS Verification Engineer

1 week ago


Bengaluru, Karnataka, India Whitefield Careers Full time
Job Description:

The AMS Verification Engineer is essential for ensuring the functionality and performance of complex analog and mixed-signal (AMS) designs.

  • This position involves collaborating closely with design and system engineers to develop and implement verification plans to validate the behavior of AMS designs in digital and analog domains.
  • The AMS Verification Engineer plays a key role in identifying and resolving design flaws, ensuring compliance with specifications, and delivering high-quality, reliable products to the market.
Key Skills:

Cadence command line flow, manager, Verilog AMS, and expertise in working in UVM-C based environments.

Key Responsibilities:
  • Develop and execute verification plans for analog and mixed-signal designs.
  • Collaborate with design and system engineers to comprehend design requirements and specifications.
  • Design and build verification environments using Verilog, SystemVerilog, and UVM.
  • Create and maintain test benches, test cases, and functional coverage models for AMS designs.
  • Conduct functional verification of AMS designs at various levels.
  • Analyze and troubleshoot simulation failures to address design issues.
  • Participate in design reviews to ensure compliance with specifications and guidelines.
  • Utilize analog behavioral models for simulation and verification purposes.
  • Engage with emulation and FPGA prototyping teams for hardware verification of AMS designs.
  • Work with cross-functional teams to integrate AMS designs into larger systems and verify their performance.
  • Contribute to enhancing verification methodologies, tools, and processes for improved efficiency and quality.
  • Document verification environments, methodologies, and outcomes for future reference.
  • Provide assistance in post-silicon validation and debugging tasks as required.
  • Stay abreast of the latest industry trends and advancements in analog and mixed-signal verification methods.
Required Qualifications:
  • Demonstrated proficiency in analog and mixed-signal verification methodologies and techniques.
  • Expertise in Verilog and SystemVerilog for RTL design and verification.
  • Hands-on experience with Universal Verification Methodology (UVM) for verification environments.
  • Thorough understanding of analog and mixed-signal design principles and concepts.
  • Familiarity with AMS simulation tools like Spice, Verilog-AMS, and AMS behavioral modeling.
  • Capability to analyze and troubleshoot complex analog and mixed-signal simulation issues.
  • Strong problem-solving skills and meticulous attention to detail in identifying design challenges.
Location:

Bangalore



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