Staff Engineer

6 months ago

Bengaluru, India Analog Devices Full time
B.Tech/M.Tech with 8+ years of industry experience in analog/mixed signal behavioral modeling at various levels of abstraction and full chip verification (AMS and DMS DV). Good understanding of analog design concepts and mixed signal design architectures. Exposure to products that integrate a wide variety of Analog/Mixed-Signal/RF building blocks such as Power Management, ADCs, DACs, PLL, bandgap references, oscillators, SerDes, RF Transceiver etc. and related digital control and signal processing. Demonstrated experience of verification plan, verification environment development and verification/debug of complex mixed signal products at block & chip-top levels. Experience of co-simulations with analog model/transistor level and digital RTL/Gate+SDFs, experience of circuit simulations with Spice/Fast Spice simulators. Proven experience in closing the verification of analog designs using industry standard metrics is a must. Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe. Proficiency in the technical management of AMS team execution is a must. Quick to adopt new technologies with good problem-solving skills. Self-motivated and enthusiastic. Come up with verification strategy for a product after going through product requirements and design specifications. Create models for analog/mixed-signal blocks for chip-top verification, tradeoff accuracy vs. speed. Validate models against actual design (self-checking tests). Create verification plans, build verification environment, develop self-checking testcases. Bring up chip top mixed-signal verification environments (AMS and DMS DV environments). Deploy industry standard SV/UVM based metric driven verification approach. Collaborate and work closely with team members from various disciplines (system architects, digital design, analog design, digital DV etc.) for first pass silicon. Support test and characterization teams in post-silicon validation. Collaborate with CAD team to deploy next generation innovative design verification methodologies to reduce overall TTM, mentor junior DV engineers in the team. Expected to be the overall AMS DV lead of a project. Mentor fresh graduates and junior engineers.

Modelling of analog blocks

SV-RNM

Verilog-AMS

Schematic based structural models (macro models)

Familiarity with Analog/Mixed-Signal/RF design architectures and debug experience with schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision. Chip-top co-simulation with tools such as Cadence ADE/Cadence AMSD with Spectre as the analog solver and Xcelium as the digital solver. Experience and debug with digital simulators such as Cadence Xcelium/Synopsys VCS. Experience with Spice/Fast Spice simulators such as Spectre Ultrasim/APS/XPS. Experience with SV/UVM (agent creation, env building, score-boarding, RAL etc.). Experience with simulation emulation accelerators. Tracking of verification metrics and regression management, Metric Driven Verification (MDV) framework using tools such as Cadence vManager. Experience with languages/tools/software relating to product development is an added advantage.

C, C++, AMS

Automation with scripting languages: Python/Perl/Shell etc.

Embedded programming for on-chip micros or separate MCU’s

Matlab/Simulink for system level simulations and modeling

Job Req Type: ExperiencedRequired Travel: Yes, 10% of the timeShift Type: 1st Shift/Days

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