DFT Lead
6 days ago
Job Description :
Responsibilities :
- Proven ownership of MBIST architecture and hands-on insertion across large memory arrays; experience with repair, redundancy, and BIRA/BISR flows.
- Hands-on scan insertion and compression, ATPG pattern generation and coverage closure.
- Solid understanding of test-mode timing, constraints, and PnR interactions; experience with test clocks/reset distribution and power intent in test modes.
- Proficiency with at least one major DFT tool suite : Synopsys (DFTMAX/SpyGlass-DFT/TetraMAX), Siemens Tessent (Scan/MBIST/ATPG), or Cadence Modus.
- Experience with JTAG/boundary scan and, ideally, IEEE 1500/
- ATE bring-up and silicon debug experience for test patterns and infrastructure.
Nice to have :
- Scripting for flow automation (Tcl/Perl/Python) in support of hands-on DFT ownership.
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