SI/PI Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.In-depth understanding of high-speed Serdes/Memory interface circuits like I/O's,PLL's, Clocking, Datapath's.Hands on experience on PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx memory interface circuits.Strong Analog Design and I/O Design fundamentals....

About Company : They balance innovation with an open, friendly culture and the backing of a long-established parent company, known for its ethical reputation. We guide customers from what's now to what's next by unlocking the value of their data and applications to solve their digital challenges, achieving outcomes that benefit both business and...

Key ResponsibilitiesDesign and develop complex PCB layouts for multi-layer boards, including high-speed, flex-rigid, and hybrid PCBs (digital and RF).Collaborate with cross-functional teams to create designs optimized for manufacturability and performance.Work on high-speed board designs with experience in Signal Integrity (SI) and Power Integrity (PI)...

About UsWe are a dynamic team of young engineers, domain experts, and seasoned sales professionals dedicated to providing comprehensive turnkey solutions for complex challenges in Signal Processing. Our expertise spans the cutting-edge technologies in Signal Processing, addressing critical needs in the Defence and Aerospace sectors. Our offerings encompass a...

Senior Hardware EngineerLocation: HyderabadAge : 30+ yearsExperience : 5-10+ yearsLanguages : English, Hindi and TeluguQualification : Electronics EngineeringTarget Salary : 12 lacsActivities:Independent System Design and planningIndependent board design, selection of partsCoordinate for design analysis reliability, thermal, signal integrity, power analysis,...

Job DescriptionRoles & Responsibilities:- Lead and manage product delivery using agile frameworks and techniques. Align with Agile values such as prioritizing individuals and interactions over processes and tools.- Lead and facilitate agile events including stand-ups, sprint/PI planning, sprint/PI reviews, retrospectives, demos and backlog refinement...

Responsibilities: Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks. Worked on 65nm or lower node...

Responsibilities:Top-level floor planning, PG Planning, partitioning, placement, scan-chain-reordering, clock tree synthesis, timing optimization, SI aware routing, timing analysis/closure, and ECO tasks (timing and functional ECOs), SI closure, design rule checks (DRC), and Logical vs. Schematic (LVS) checks, Antenna checks.Worked on 65nm or lower node...

Company Overview : MosChip is a semiconductor and embedded system design company with a focus on Embedded, Turnkey ASICs, Mixed Signal IP, Semiconductor & Product Engineering and IoT solutions catering to Aerospace & Defence, Consumer Electronics, Automotive, Medical and Networking & Telecommunications. Job Description: Experience: 4 - 12 Years Location:...

Overview:The Release Train Engineer (RTE) will guide Agile teams developing solutions, using Agile best practices. The RTE will ensure clear communication and guide the Agile Release Train to deliver the Program Increment commitment on time and drive the appropriate Agile methodology (Scrum/Kanban/etc.) focused on predictable, quality, business value...