DV Contract Engineer

Exciting Opportunities in Taras System and SolutionsDesignation: Lead Engineer (DV)Experience: 10+ yearsNotice Period: Immediate to 30 daysRoles and Responsibilities:JD for DV engineers (10-15 years of experience)- SOC Verification Experience on ARM EcosystemTest cases Experience in C and C++- PCIE Experience and also PCIE-VIP usage experience- GLS working...

Company DescriptionTechsoc Technologies Private Limited is an engineering services company specializing in VLSI design and verification services. Founded by Dudam Rajanikanth, the company has expertise in casting product ideas into System-on-chip with cost effectiveness, optimized performance, and area efficiency. TechsoC caters to the needs of clients...

LTTS is hiring for Design Verification Engineers with 5+ Years of experience.Job Location : Bangalore, IndiaDetailed JD is as below ::Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verificationDevelop functional tests based on verification test planDrive Design...

Responsibilities: Complete ownership of IP/subsystem/SOC DV ownership right from spec definition till the post silicon verification and solving the customer issues on need basis. This includes:Active involvement with architecture team during the spec definition phase Verification strategy definition along with Verification plan to meet 100% spec to...

LTTS is hiring for Design Verification Engineers with 5+ Years of experience.Job Location : Bangalore, IndiaDetailed JD is as below ::Job Description DV Positions:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-stem/SoC level verificationDevelop functional tests based on verification test planDrive Design...

We are hiring a DV Power Management Engineer with 4+ years of experience in PL design, Vivado project flows, and Xilinx/AMD devices. Must be skilled in Linux and scripting (TCL/Shell/Python). Knowledge of RTL coding and Vitis flows is an advantage. Required Candidate profileSeeking a DV Power Management Engineer with 4+ years in PL design, Vivado, and...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned.8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologiesExperience in development of UVM based...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned. 8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification 8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologies Experience in development of UVM based...

LTTS is looking for DV engineers with 7+ years of experience for lead role...detailed JD is below mentioned. 8/10+ of hands-on experience in StemVerilog/UVM methodology and/or C/C++ based verification 8/ 10+ experience in IP/sub-stem and/or SoC level verification based on StemVerilog UVM/OVM based methodologies Experience in development of UVM based...

Company Qualcomm India Private LimitedJob Area Engineering Group Engineering Group Hardware EngineeringGeneral Summary As a leading technology innovator Qualcomm pushes the boundaries of what s possible to enable next-generation experiences and drives digital transformation to help create a smarter connected future for all As a Qualcomm Hardware...