Design Verification/GLS

2 weeks ago


Bengaluru, Karnataka, India 7Rays Semiconductors Full time ₹ 9,00,000 - ₹ 12,00,000 per year

Strong Debug, UVM, System Verilog

Reading Specs and developing test plans

Monitors, scoreboards, sequencers, and sequences, that utilize scripts, System Verilog, UVM, UVM_REG, and methodologies to increase the rate with which bugs are found and resolved

Demonstrated technical expertise in functional verification of complex designs including test planning, test bench development, stimulus generation, checking, and functional coverage

Candidates should be comfortable checking our builds, navigating big test benches, analyzing coverage, and adding or enabling extra debug, must be willing to dig into fail and understand what is happening


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