Design Verification Engineer

Role & responsibilities

Job Summary:

We are seeking a highly skilled ASIC Design Verification Engineer with extensive experience in various verification methodologies. The ideal candidate will have a deep understanding of functional, formal, CPU, and GLS verification. The role requires expertise in SoC and IP level verification, particularly with high-speed protocols. This position demands a thorough knowledge of verification techniques, tools, and processes to ensure the highest quality in our ASIC designs.

Key Responsibilities:

• Develop and execute comprehensive verification plans for ASIC designs.

• Utilize various verification methodologies, including functional, formal, CPU, and GLS verification.

• Conduct SoC level verification, ensuring integration and functionality of multiple IPs.

• Implement IP verification strategies for high-speed protocols such as PCIe, USB, Ethernet, DDR, MIPI, and others.

• Collaborate with design and architecture teams to understand design specifications and requirements.

• Create, maintain, and enhance testbenches and simulation environments.

• Perform coverage analysis and closure to ensure all scenarios are tested.

• Debug and resolve complex design and verification issues.

• Document and present verification results to cross-functional teams.

• Mentor junior engineers and contribute to the continuous improvement of verification processes.

Required Skills and Qualifications:

• **Experience:** 5+ to 20+ years in ASIC design verification.

• **Education:** Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.

• **Languages and Methodologies:**

• Proficient in SystemVerilog, UVM (Universal Verification Methodology), C/C++.

• Strong understanding of OO (Object-Oriented) concepts.

• Experience in writing assumptions, sequences, virtual sequences, tests, and coverage closures.

• Knowledge of UVM factory and configurations, UVM callbacks.

• **Tools:**

• Simulation tools: VCS, ModelSim, Questa, etc.

• Formal verification tools: JasperGold, VC Formal, etc.

• GLS tools: Synopsys, Cadence, or Mentor tools.

• Debug tools: Verdi, DVE, SimVision, etc.

• Coverage tools: Specman, Coverage Analyzer, etc.

• **Protocols:**

• High-speed protocols: PCIe, USB, Ethernet, DDR, MIPI, SATA, SerDes, etc.

• SoC level protocols: AMBA (AXI, AHB, APB), ARM CoreSight, etc.

• **Techniques:**

• Assertion-based verification.

• Random and directed test methodologies.

• Power-aware verification.

• Performance and throughput analysis.

• Emulation and prototyping.

SoC Level Verification:

• **Responsibilities:**

• Verify the integration of various IP blocks within the SoC.

• Ensure proper functionality and communication between different IPs.

• Utilize techniques such as simulation, emulation, and formal methods.

• Perform power and performance analysis.

• Validate system-level features and use cases.

• **Required Knowledge:**

• Advanced knowledge of SoC architectures.

• Experience with ARM cores and subsystems.

• Familiarity with interconnects and communication protocols.

Subsystem Level Verification:

• **Responsibilities:**

• Verify individual subsystems such as memory controllers, interconnects, and peripheral interfaces.

• Ensure subsystem integration within the larger SoC context.

• Develop and execute detailed verification plans specific to each subsystem.

• **Required Knowledge:**

• Deep understanding of subsystem-level protocols and interfaces.

• Experience with verification of memory interfaces (DDR, LPDDR), high-speed interfaces (PCIe, Ethernet), and peripheral interfaces (I2C, SPI, UART).

Soft Skills:

• Strong analytical and problem-solving skills.

• Excellent communication and collaboration abilities.

• Ability to work independently and as part of a team.

• Leadership skills for mentoring junior engineers.

Preferred Qualifications:

• Prior experience in leading verification projects.

• Contributions to industry standards or verification methodologies.

• Publications or patents in the field of ASIC verification.