Physical Design
1 week ago
7+ years of experience in ASIC/SoC Physical Design and STA implementation. Prior experience in handling complex hierarchical designs and leading block-level or top-level integration.
Required Skills & Tools:
- Strong expertise in ASIC Physical Design flow (Synthesis to GDSII).
- Hands-on experience with EDA tools such as:
- Synopsys: Design Compiler, ICC2, PrimeTime
- Cadence: Innovus, Tempus
- Mentor Graphics: Calibre
- In-depth understanding of STA concepts — setup/hold analysis, OCV/AOCV, SI, and Crosstalk.
- Knowledge of clock tree design, power optimization techniques, and floorplanning strategies.
- Familiarity with Scripting (TCL, Perl, Python, or Shell) for automation.
- Understanding of foundry technology files, standard cells, and process nodes (7nm, 14nm, 28nm, etc.).
Job Type: Full-time
Pay: ₹543, ₹2,553,576.97 per year
Work Location: In person
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