CPU Core Feature Verification

11 hours ago

Bengaluru, Karnataka, India Tenstorrent Full time ₹ 12,00,000 - ₹ 36,00,000 per year

Description :

Principal/Senior CPU Core Feature Verification and Debug Engineer

Location : Bangalore, India

Experience : 410 years

About the Role :

Tenstorrent, a leader in cutting-edge AI technology and high-performance computing, is seeking a highly skilled CPU Core Feature Verification and Debug Engineer to join our team in Bangalore. This role is crucial for verifying our custom, high-performance RISC-V CPU core from the ground up. You will be responsible for both ISA (Instruction Set Architecture) and detailed microarchitectural verification at the core level, contributing significantly to a platform that unifies innovations across software, compilers, and semiconductors. We are hiring contributors across all seniorities (415 years).

Key Responsibilities :

- Core Level Verification : Serve as the core-level feature/testplan verification engineer, responsible for comprehensive verification of the CPU ISA and microarchitectural features of the high-performance Out-of-Order (OOO) CPU.

- Stimulus Generation : Develop and integrate sophisticated UVM-based stimulus generation targeting both complex ISA compliance and specific microarchitectural scenarios.

- Debug and Analysis : Execute in-depth debugging of RTL (Register-Transfer Level) and Design Verification (DV) issues within a simulation environment, demonstrating proficiency in waveform and log file-based debug techniques.

- Test Development : Utilize assembly, C/C to develop targeted tests for feature verification and coverage closure.

- Verification Environments : Work proficiently across various verification environments, including simulation, formal verification, and emulation setups.

- Tooling and Scripting : Maintain hands-on proficiency with scripting languages (Python, PERL) for test automation, data processing, and workflow enhancement.

- Design & Simulators : Leverage knowledge of hardware description languages (Verilog, VHDL) and industry-standard simulators (VCS, NC, Verilator) for effective verification.

Required Skill Set (Mandatory Skills) :

- Experience : 410 years of relevant experience in CPU verification, design verification, or computer architecture.

- CPU Microarchitecture : Strong background and demonstrated experience with high-performance Out-of-Order (OOO) CPU microarchitecture.

- ISA Knowledge : Experience and strong understanding of one or more major ISAs : x86, ARM, or RISC-V.

- Debug Expertise : Proven expertise in debugging RTL and DV environments, with proficiency in waveform and log file analysis.

- Test Development : Experience using assembly, C/C , and UVM for test stimulus generation.

- Technical Tools : Hands-on experience with scripting (Python, PERL) and simulators (VCS, NC, or Verilator).

- Fundamentals : Strong problem-solving and debug skills across various levels of design hierarchies.

Preferred Skills :

- Specific experience with the RISC-V ISA and its extensions.

- Prior experience working in an AI/accelerator domain.

- Familiarity with functional coverage closure and formal verification methodologies.

Principal/Senior CPU Core Feature Verification and Debug Engineer

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