CPU Staff Core Validation Engineer
2 hours ago
General Summary:
As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Roles and Responsibilities:
Develop detailed test plan considering the IP arch and uarch features.
Work with CPU design and verification teams to develop CPU bring up and functional validation test plans for the IP owned.
Develop validation methodology and test contents to exercise on emulators during pre-Si phase and on Silicon.
Work with SOC bring up teams, software teams to plan CPU core features bringup and end to end validation.Triage and debug failures on Silicon.Develop test contents and testing strategies to assist validation of CPU on silicon.Work with CPU verification teams to reproduce silicon fails on emulators and FPGAs.Work with design team to suggest, architect new debug features to improve future CPU bringups.
Minimum Requirements:
BA/BS degree in CS/EE/ECE with 7+ years experience.7+ Experience in Silicon Validation and bring up.Implementation of assembly, C/C++ language embedded firmwareExperience with software tool chain including assemblers, C compilers, Makefiles, and source code control tools.Preferred Requirements:Good understanding of micro-processor architecture, in domains such as: Cache Coherence, Memory ordering and Consistency, Prefetching, Branch Prediction, Renaming, Speculative execution, and Address Translation/Memory Management.
Understanding of HW debug architecture of the subsystems.
Knowledge of Random Instruction Sequencing (RIS) and testing a given design, at the Block/Unit-level and Subsystem/Chip-level for proving correctness.Experience in writing Test plans and Assembly code.Ability to develop and work independently on a block/unit of the design.
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