
Verification Engineer
6 days ago
Exciting Career Opportunities in ASIC/SOC Verification – Join Our Team in Bangalore
Location:
Bangalore |
Notice Period:
Immediate to 30 Days
JD 1: End-to-End Power Verification
Requirement:
2 Engineers (6 yrs), 1 Engineer (4 yrs)
Key Skills:
- Power-aware verification with
UPF - Verification of leakage, sleep, clock tree, active use cases
- Clock & reset verification
(glitch, freq, spec compliance, multiple paths) - Power switch coverage analysis
- Strong DV (SystemVerilog, UVM), RTL + GLS with PG netlist
- Understanding of
power intent & SoC clock/reset architecture
JD 2: DSP Subsystem Verification
Requirement:
2 Engineers (6 yrs, 4 yrs)
Key Skills:
- DSP subsystem test case development &
performance analysis - Processor knowledge (
DSP preferred
) - Exposure to
Neural Network Engines (NNE) - Performance verification
methods - C-based verification
- strong SV/UVM knowledge
JD 3: Debug Subsystem Verification
Requirement:
2 Engineers (6 yrs), 1 Engineer (2 yrs)
Key Skills:
- End-to-end
Debug Subsystem verification - RTL DV, GLS, coverage closure
- Understanding of
ARM CoreSight Debug Architecture - Work with
architecture & SW teams
for debug requirements - Define
Verification Plan (VPlan) - CPU debug system understanding (
trace, crash debug
) - Strong
SV, UVM, C
expertise
Apply/Refer:
WhatsApp:
Let's start applying
If you're not interested, no problem — let's stay in touch for future opportunities.
Please feel free to
refer the right candidate
and help them grab this opportunity
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