Design Verification Engineer
1 week ago
Job Summary:
We are looking for a skilled and motivated Design Verification (DV)/SoC Verification Engineer with over 3 years of hands-on experience in SoC-level verification, Low Power Verification, Gate-Level Simulation (GLS), and PCIe/Peripheral Interface Verification. The ideal candidate will play a key role in verifying complex SoCs, ensuring functional correctness, power intent, and interface compliance across design levels.
Key Responsibilities:
Develop and execute verification plans for SoC and subsystem-level environments.
Drive testbench development using System Verilog/UVM methodologies.
Perform Low Power (UPF-based) verification including power-aware simulations and assertions.
Execute and debug Gate-Level Simulations (GLS) for timing-aware verification.
Verify PCIe and other high-speed peripheral interfaces for protocol compliance.
Analyze code coverage and functional coverage to ensure comprehensive validation.
Collaborate with RTL, DFT, and backend teams to ensure timely tape-outs.
Debug complex SoC issues using simulation tools and waveform analysis.
Support regressions, debug failures, and perform root-cause analysis.
Required Skills & Experience:
3+ years of industry experience in SoC/Subsystem DV.
Strong hands-on experience with System Verilog, UVM methodology.
Proven experience in Low Power Verification using UPF (Unified Power Format).
Solid understanding and practical experience with GLS (Gate-Level Simulation).
Experience verifying PCIe or similar high-speed protocols (USB, AXI, etc.).
Good debugging skills using simulation tools (VCS, Questa, etc.).
Familiarity with coverage-driven verification and functional coverage closure.
Experience with scripting (Python, Perl, Shell) is a plus.
Exposure to formal verification tools and techniques is a bonus.
Preferred Qualifications:
Bachelor's or Master's degree in Electrical/Electronics/Computer Engineering or related field.
Strong problem-solving skills and ability to work in a fast-paced environment.
Excellent written and verbal communication skills.
Passion for learning and working on complex SoC designs.
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