PCIe Design Verification Engineer

PCIe Design Verification Engineer (Peripheral Component Interconnect Express)Perform functional and compliance verification of PCIe-based SystemC IPs and subsystems.Integrate SystemC PCIe IP/Subsystem in Avery PCIe VIPs and utilize for protocol-level verification.Debug complex issues across transaction, data link, and physical layers of PCIe.Analyze and...

Job Requirements • An expert level experience with PCIe/CXL IP/sub-systems. • Highly experienced with defining block, sub-system and SOC top level test plans. • An expert level with developing UVM-based SV test-benches. • Deep understanding and knowledge of verification methodologies flows and quality metrics. • Great debugging and problem-solving...

Project descriptionWe are passionate about transforming lives through cutting-edge technology, enriching industries, communities, and the world. Our mission is to create exceptional products that drive next-generation computing experiences, serving as the foundation for data centers, artificial intelligence, PCs, gaming, and embedded systems. At the core of...

Job InformationJob Opening IDZR_167_JOBIndustrySemiconductorDate Opened08/22/2025Job TypeFull timeWork Experience12+ YearsCityBangalore / HyderabadState/ProvinceKarnataka / TelanganaCountryIndiaZip/Postal Code560078Job DescriptionASIC Verification Engineer – PCIe Expert (12+ years)Location: Bangalore / HyderabadWe are looking for an experienced ASIC...

Job Description SoC Verification Engineer Job# VE701 Senior Verification Engineer/Verification Engineer Technical Skills Required SOC Verification plan definition, DV environment development in SV/UVM Design verification at RTL/Gate level, DV Coverage analysis, Coverage improvement at block and Chip level Support of assertion and coverage-driven methodology...

Job Description:Were looking for passionate Design Verification Engineers experienced in ASIC/SoC environments to contribute to high-performance PCIe, Networking, and IP Sub-System verification using industry-leading tools and methodologies.Key Responsibilities & Skills:Develop UVM-based testbenches and verification infrastructure for complex SoC and IP...

We need experienced engineers to verify an IP/full-chip using System Verilog/UVM. Expertise in PCIe/DDR verification is preferable at IP/chip level. Skills: Overall 3+ years industry experience in Design Verification using System-Verilog/C/UVM. Generic knowhow on Digital Design and Verification methodologies. Experience in System Verilog/UVM based IP/SoC...

ResponsibilitiesUnderstand the standards/specificationsArchitecture development and documenting implementation level detailsHands on work for every aspect of verification cycleResponsible for the compliance with the latest Methodologies.Developing Verification IPsDefine Functional Coverage matrix and Comprehensive Test planRegression management and...

Job Description ASIC/SoC/IP Verification Engineer Lead Job# VE701 Technical Skills Required ASIC/SOC/IP Verification plan definition, testbench environment development in SystemVerilog/UVM Design verification at RTL/Gate level, DV Coverage analysis, Coverage improvement at block and Chip level Support of assertion and coverage-driven methodology Develop...

Job Description ASIC Design Engineer (Lead/Senior/Junior RTL Design) Job# VE903 Roles & Responsibilities Define micro architecture from datasheet or requirements document Perform RTL-level design, Synthesis, STA, CDC and Lint for any digital logic Perform module-level verification and lint checking Interact with verification engineers for test plan review,...