ASIC Design Verification Engineer
6 days ago
Job Description:
Were looking for passionate Design Verification Engineers experienced in ASIC/SoC environments to contribute to high-performance PCIe, Networking, and IP Sub-System verification using industry-leading tools and methodologies.
Key Responsibilities & Skills:
- Develop UVM-based testbenches and verification infrastructure for complex SoC and IP subsystems.
- Define and execute verification plans, coverage metrics, assertions, and regression strategies.
- Work on block-level and subsystem-level verification, ensuring reusable and scalable verification components.
- Collaborate with design, validation, and integration teams to ensure end-to-end functional quality.
- Strong knowledge of SystemVerilog, UVM, and experience with Questa, VCS, or Xcelium simulators.
- Exposure to PCIe, Ethernet, DMA, or Cryptography protocols, along with AMBA AXI/APB.
- Scripting experience in Perl or Python, excellent debugging skills, and a collaborative mindset.
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ASIC Design Verification Engineer
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ASIC Design Verification Engineer
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