Fulltime Onsite: SV Engineer

Role : Workday Studio DeveloperCompany : WillWare TechnologiesExperience : 5+ YearsLocation : Chennai, Bangalore, Hyderabad, VijayawadaWork Mode : Onsite / FulltimeKey Responsibilities:Design, develop, and deploy Workday Studio integrations between Workday HCM and external systems.Build and maintain integrations for Payroll, Benefits, Recruiting, Time...

JOB DESCRIPTION Title/Position: Design Verification Engineer Location: Bangalore, Hyderabad, Chennai Positions: 10 Type: Fulltime Mail ID: Key Skills and Responsibilities: IP verification Using SV/UVM or SOC Verification using C/SV VIP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART (3+) High Speed Serial Interfaces:...

JOB DESCRIPTION Title/Position: Design Verification Engineer Location: Bangalore, Hyderabad, Chennai Positions: 10 Type: Fulltime Mail ID: mallika.dhamotharapandiyan@tessolve.com Key Skills and Responsibilities: - IP verification Using SV/UVM or SOC Verification using C/SV - VIP Integration - Interconnect Protocols: AHB, AXI, APB - SOC Interfaces: GPIO, SPI,...

JOB DESCRIPTION Title/Position: Design Verification Engineer Location: Bangalore, Hyderabad, Chennai Positions: 10 Type: Fulltime Mail ID: Key Skills and Responsibilities: IP verification Using SV/UVM or SOC Verification using C/SV VIP Integration Interconnect Protocols: AHB, AXI, APB SOC Interfaces: GPIO, SPI, I2C, UART (3+) High Speed Serial Interfaces:...

Position : DFT Data EngineerExperience : 5+ yearsLocation : BengaluruJob type: Onsite(Fulltime)CTC : 20 LPASKills :*APTG*J Tag*M Beast

Tips: UVM, Design Verification.ResponsibilitiesSenior DV engineer to develop UVM/SV-based testbenchGood knowledge of SV/UVM is a must.Should have developed UVM/SV components like driver/monitor/scoreboard,Individual contributor roleExposure to protocols like AMBA, Serial protocols, PCIe, EthernetQualifications6 to 8 years of DV experience minimum.Mtech/Btech...

Tips: UVM, Design Verification.ResponsibilitiesSenior DV engineer to develop UVM/SV-based testbench Good knowledge of SV/UVM is a must.Should have developed UVM/SV components like driver/monitor/scoreboard,Individual contributor role Exposure to protocols like AMBA, Serial protocols, PCIe, Ethernet Qualifications 6 to 8 years of DV experience...

Tips: UVM, Design Verification.Responsibilities- Senior DV engineer to develop UVM/SV-based testbench- Good knowledge of SV/UVM is a must.- Should have developed UVM/SV components like driver/monitor/scoreboard,- Individual contributor role- Exposure to protocols like AMBA, Serial protocols, PCIe, EthernetQualifications- 6 to 8 years of DV experience...

Tips: UVM, Design Verification. Responsibilities Senior DV engineer to develop UVM/SV-based testbench Good knowledge of SV/UVM is a must. Should have developed UVM/SV components like driver/monitor/scoreboard, Individual contributor role Exposure to protocols like AMBA, Serial protocols, PCIe, Ethernet Qualifications 6 to 8 years of DV experience minimum....

Role: Power Management/ Low power verificationLocation: Bangalore, India, On-site roleFulltime.We just had an intake call, and we don't have a detailed job description.Please see belowPower-aware verification with UPF annotatedVarious power scenarios verificationPower vector generation for leakage, sleep, clock tree, and active use casesClock verification...