RTL Designer

16 hours ago

Bengaluru, Karnataka, India Zigsaw Full time ₹ 1,20,00,000 - ₹ 2,80,00,000 per year

RTL Designer

Exp (Yrs):
4 to 10

Budget :
12-28LPA(depends on Experience)

Work Location:
Bangalore

Urgency / Expected Joining Time:
Immediate to 15days


• Experience with micro architecture design and system design. Using Verilog, SV or VHDL.


• Strong background in RTL design Verilog, System Verilog


• Experience in Spyglass Lint, CDC, SoC Integration


• Experience in Logic design with Verilog, SV


• Experience in ASIC Synthesis, STA and timing closure


• Experience in any Processor based system, design with SoC, AXI/AHB/APB System bus and peripherals Ethernet, PCIe, DDR , USB, UART, SPI , I2C etc


• Synthesis, Timing Analysis through various industry standard tools.


• Developed complex SOC and IP modules


• Proficient in defining SOC architecture, High level design document, Low level design document, Code reviews


• Hands on experience in Lint tools Spyglass , resolve Design errors for Synthesis, verification, DFT


• Knowledge of Perl/Shell Scripting.


• Prior experience of standard protocols is plus (I2c, UART, SPI, PCIE, MIPI, Ethernet, DDR, USB, AMBA)


• TCL, Python Scripting

Mandatory Skills:


•Strong background in RTL design Verilog, System Verilog


• Experience in Spyglass Lint, CDC, SoC Integration


• Experience in Logic design with Verilog, SV


• Experience in ASIC Synthesis, STA and timing closure


• Experience in any Processor based system, design with SoC, AXI/AHB/APB System bus and peripherals Ethernet, PCIe, DDR , USB, UART, SPI , I2C etc

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